LoongArch64 assembly pack: Really implement OPENSSL_rdtsc

LoongArch [rdtimel.w][1] instruction reads the low 32 bits of the
64-bit stable counter, implement OPENSSL_rdtsc with it instead

LoongArch64 assembly pack: Really implement OPENSSL_rdtsc

LoongArch [rdtimel.w][1] instruction reads the low 32 bits of the
64-bit stable counter, implement OPENSSL_rdtsc with it instead of always
returning 0.

[1]:https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_rdtimelh_w_rdtime_d

Reviewed-by: Hugo Landau <hlandau@openssl.org>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22823)

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Add LoongArch64 cpuid and OPENSSL_loongarchcap_P

Loongarch64 architecture defines 128 bit vector extension lsx and 256 bit
vector extension lasx. The cpucfg instruction can be used to ob

Add LoongArch64 cpuid and OPENSSL_loongarchcap_P

Loongarch64 architecture defines 128 bit vector extension lsx and 256 bit
vector extension lasx. The cpucfg instruction can be used to obtain whether
the CPU has a corresponding extension. This part of code is added to prepare
for the subsequent addition of corresponding vector instruction optimization.

Signed-off-by: zhuchen <zhuchen@loongson.cn>

Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/19364)

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