Lines Matching refs:reg_size
3913 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_mov() local
3923 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_mov()
3932 if (reg_size == 4) in sljit_emit_simd_mov()
3936 if (reg_size == 4) in sljit_emit_simd_mov()
3944 if (reg_size == 4) in sljit_emit_simd_mov()
3956 | (sljit_ins)((reg_size == 3) ? (0x7 << 8) : (0xa << 8)); in sljit_emit_simd_mov()
3958 SLJIT_ASSERT(reg_size >= alignment); in sljit_emit_simd_mov()
4066 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_replicate() local
4075 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_replicate()
4084 if (reg_size == 4) in sljit_emit_simd_replicate()
4088 return push_inst(compiler, VMOV_i | ((reg_size == 4) ? (1 << 6) : 0) | VD(freg)); in sljit_emit_simd_replicate()
4111 if (reg_size == 4) in sljit_emit_simd_replicate()
4121 if (reg_size == 4) in sljit_emit_simd_replicate()
4134 if (reg_size == 4) in sljit_emit_simd_replicate()
4156 if (reg_size == 4) in sljit_emit_simd_replicate()
4166 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_lane_mov() local
4175 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_lane_mov()
4184 if (reg_size == 4) in sljit_emit_simd_lane_mov()
4188 ins = (reg_size == 3) ? 0 : ((sljit_ins)1 << 6); in sljit_emit_simd_lane_mov()
4212 if (reg_size == 4 && lane_index >= (0x8 >> elem_size)) { in sljit_emit_simd_lane_mov()
4283 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_lane_replicate() local
4290 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_lane_replicate()
4299 if (reg_size == 4) { in sljit_emit_simd_lane_replicate()
4322 if (reg_size == 4) in sljit_emit_simd_lane_replicate()
4332 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_extend() local
4342 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_extend()
4351 if (reg_size == 4) in sljit_emit_simd_extend()
4356 if (reg_size == 4 && elem2_size - elem_size == 1) in sljit_emit_simd_extend()
4359 …FAIL_IF(push_inst(compiler, VLD1_s | (sljit_ins)((reg_size - elem2_size + elem_size) << 10) | VD(f… in sljit_emit_simd_extend()
4361 } else if (reg_size == 4) in sljit_emit_simd_extend()
4365 dst_reg = (reg_size == 4) ? freg : TMP_FREG2; in sljit_emit_simd_extend()
4379 SLJIT_ASSERT(reg_size == 4); in sljit_emit_simd_extend()
4397 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_sign() local
4407 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_sign()
4422 imms = (reg_size == 4) ? 0x243219 : 0x2231; in sljit_emit_simd_sign()
4426 imms = (reg_size == 4) ? 0x2231 : 0x21; in sljit_emit_simd_sign()
4435 if (reg_size == 4) { in sljit_emit_simd_sign()
4443 if (reg_size == 4 && elem_size > 0) in sljit_emit_simd_sign()
4446 ins = (reg_size == 4 && elem_size == 0) ? (1 << 6) : 0; in sljit_emit_simd_sign()
4458 if (reg_size == 4 && elem_size == 0) { in sljit_emit_simd_sign()
4473 sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type); in sljit_emit_simd_op2() local
4480 if (reg_size != 3 && reg_size != 4) in sljit_emit_simd_op2()
4501 if (reg_size == 4) { in sljit_emit_simd_op2()
