Lines Matching refs:XXH_PRIME32_1
1888 #define XXH_PRIME32_1 0x9E3779B1U /*!< 0b10011110001101110111100110110001 */ macro
1895 # define PRIME32_1 XXH_PRIME32_1
1917 acc *= XXH_PRIME32_1; in XXH32_round()
1998 h32 = XXH_rotl32(h32, 11) * XXH_PRIME32_1; \ in XXH32_finalize()
2092 xxh_u32 v1 = seed + XXH_PRIME32_1 + XXH_PRIME32_2; in XXH32_endian_align()
2095 xxh_u32 v4 = seed - XXH_PRIME32_1; in XXH32_endian_align()
2162 state.v[0] = seed + XXH_PRIME32_1 + XXH_PRIME32_2; in XXH32_reset()
2165 state.v[3] = seed - XXH_PRIME32_1; in XXH32_reset()
3771 const __m512i prime32 = _mm512_set1_epi32((int)XXH_PRIME32_1); in XXH3_scrambleAcc_avx512()
3867 const __m256i prime32 = _mm256_set1_epi32((int)XXH_PRIME32_1); in XXH3_scrambleAcc_avx2()
3973 const __m128i prime32 = _mm_set1_epi32((int)XXH_PRIME32_1); in XXH3_scrambleAcc_sse2()
4075 uint32x2_t prime = vdup_n_u32 (XXH_PRIME32_1); in XXH3_scrambleAcc_neon()
4171 xxh_u32x4 const prime = { XXH_PRIME32_1, XXH_PRIME32_1, XXH_PRIME32_1, XXH_PRIME32_1 }; in XXH3_scrambleAcc_vsx()
4225 acc64 *= XXH_PRIME32_1; in XXH3_scrambleAcc_scalar()
4443 XXH_PRIME64_4, XXH_PRIME32_2, XXH_PRIME64_5, XXH_PRIME32_1 }
4697 statePtr->acc[7] = XXH_PRIME32_1; in XXH3_reset_internal()
