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7ed6de99 |
| 05-Sep-2024 |
Tomas Mraz |
Copyright year updates Reviewed-by: Neil Horman <nhorman@openssl.org> Release: yes
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c45ca065 |
| 20-Mar-2024 |
Adrien Zinger |
Fix GCC compilation -Waggressive-loop-optimizations GCC 13.1.0 were reporting a compilation warning with -O2/3 and -Waggressive-loop-optimizations. GCC is raising an undefined behavior i
Fix GCC compilation -Waggressive-loop-optimizations GCC 13.1.0 were reporting a compilation warning with -O2/3 and -Waggressive-loop-optimizations. GCC is raising an undefined behavior in the while loop. Replace the while loop with a memset call at the top of the function. Fixes #21088 CLA: trivial Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de> Reviewed-by: Neil Horman <nhorman@openssl.org> (Merged from https://github.com/openssl/openssl/pull/23898)
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da1c088f |
| 07-Sep-2023 |
Matt Caswell |
Copyright year updates Reviewed-by: Richard Levitte <levitte@openssl.org> Release: yes
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4b65d79d |
| 03-Nov-2022 |
Tomas Mraz |
rsaz_exp_x2.c: Remove unused ALIGN64 macro Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/p
rsaz_exp_x2.c: Remove unused ALIGN64 macro Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19597)
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9506a2e2 |
| 03-Nov-2022 |
Tomas Mraz |
rsaz_exp_x2.c: Avoid potential undefined behavior with strict aliasing Fixes #19584 Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org>
rsaz_exp_x2.c: Avoid potential undefined behavior with strict aliasing Fixes #19584 Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19597)
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f83490fb |
| 03-Nov-2022 |
Tomas Mraz |
Revert "Fix an occasional CI failure due to unaligned access" This reverts commit 8511520842b744d1794ea794c032ce5f78cd874b. Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-b
Revert "Fix an occasional CI failure due to unaligned access" This reverts commit 8511520842b744d1794ea794c032ce5f78cd874b. Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19597)
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85115208 |
| 11-Oct-2022 |
Bernd Edlinger |
Fix an occasional CI failure due to unaligned access This happens rarely, but only because very few CI runs use the exotic CPU type that is necessary to execute anything within rsaz_
Fix an occasional CI failure due to unaligned access This happens rarely, but only because very few CI runs use the exotic CPU type that is necessary to execute anything within rsaz_exp_x2.c and enable UBSAN at the same time. crypto/bn/rsaz_exp_x2.c:562:20: runtime error: load of misaligned address 0x612000022cc6 for type 'uint64_t' (aka 'unsigned long'), which requires 8 byte alignment 0x612000022cc6: note: pointer points here 84 a3 78 e0 8e 8d 4a a5 51 9c 57 d0 d6 41 f3 26 d1 4e e1 98 42 b5 3a 9f 04 f1 73 d2 1d bf 73 44 ^ SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior crypto/bn/rsaz_exp_x2.c:562:20 in ../../util/wrap.pl ../../fuzz/server-test ../../fuzz/corpora/server => 1 not ok 2 - Fuzzing server Reviewed-by: Hugo Landau <hlandau@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19394)
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4d8a88c1 |
| 22-Jun-2022 |
Xi Ruoyao |
rsa: fix bn_reduce_once_in_place call for rsaz_mod_exp_avx512_x2 bn_reduce_once_in_place expects the number of BN_ULONG, but factor_size is moduli bit size. Fixes #18625.
rsa: fix bn_reduce_once_in_place call for rsaz_mod_exp_avx512_x2 bn_reduce_once_in_place expects the number of BN_ULONG, but factor_size is moduli bit size. Fixes #18625. Signed-off-by: Xi Ruoyao <xry111@xry111.site> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18626)
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6d702ceb |
| 09-Jun-2022 |
Tomas Mraz |
Add an extra reduction step to RSAZ mod_exp implementations Inspired by BoringSSL fix by David Benjamin. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pau
Add an extra reduction step to RSAZ mod_exp implementations Inspired by BoringSSL fix by David Benjamin. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18510)
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2437832b |
| 16-Dec-2021 |
Pauli |
rsa exp: move declarations before code Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/1
rsa exp: move declarations before code Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17287)
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23effeb8 |
| 24-Nov-2021 |
Pauli |
Fix Coverity 1494385 logically dead code. Reviewed-by: Dmitry Belyavskiy <beldmit@gmail.com> (Merged from https://github.com/openssl/openssl/pull/17123)
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Revision tags: openssl-3.0.0-alpha17, openssl-3.0.0-alpha16, openssl-3.0.0-alpha15, openssl-3.0.0-alpha14, OpenSSL_1_1_1k, openssl-3.0.0-alpha13, openssl-3.0.0-alpha12, OpenSSL_1_1_1j, openssl-3.0.0-alpha11, openssl-3.0.0-alpha10 |
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f87b4c4e |
| 08-Dec-2020 |
Andrey Matyukov |
Dual 1536/2048-bit exponentiation optimization for Intel IceLake CPU It uses AVX512_IFMA + AVX512_VL (with 256-bit wide registers) ISA to keep lower power license. Reviewed-by:
Dual 1536/2048-bit exponentiation optimization for Intel IceLake CPU It uses AVX512_IFMA + AVX512_VL (with 256-bit wide registers) ISA to keep lower power license. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/14908)
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e475d9a4 |
| 25-May-2021 |
Pauli |
rsa: rename global rsaz_ sumbols so they are in namespace The symbols renamed are: RSAZ_amm52x20_x1_256 RSAZ_amm52x20_x2_256 rsaz_avx512ifma_eligible RSAZ_mod_exp_avx512
rsa: rename global rsaz_ sumbols so they are in namespace The symbols renamed are: RSAZ_amm52x20_x1_256 RSAZ_amm52x20_x2_256 rsaz_avx512ifma_eligible RSAZ_mod_exp_avx512_x2 Additionally, RSAZ_exp52x20_x2_256 was made static Reviewed-by: Shane Lontis <shane.lontis@oracle.com> (Merged from https://github.com/openssl/openssl/pull/15445)
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190c029e |
| 25-May-2021 |
Pauli |
bn: rename extract_multiplier_2x20_win5 -> ossl_extract_multiplier_2x20_win5 Reviewed-by: Shane Lontis <shane.lontis@oracle.com> (Merged from https://github.com/openssl/openssl/pull/1544
bn: rename extract_multiplier_2x20_win5 -> ossl_extract_multiplier_2x20_win5 Reviewed-by: Shane Lontis <shane.lontis@oracle.com> (Merged from https://github.com/openssl/openssl/pull/15445)
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3c2bdd7d |
| 08-Apr-2021 |
Matt Caswell |
Update copyright year Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/14801)
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c781eb1c |
| 08-Dec-2020 |
Andrey Matyukov |
Dual 1024-bit exponentiation optimization for Intel IceLake CPU with AVX512_IFMA + AVX512_VL instructions, primarily for RSA CRT private key operations. It uses 256-bit registers to avoid CPU
Dual 1024-bit exponentiation optimization for Intel IceLake CPU with AVX512_IFMA + AVX512_VL instructions, primarily for RSA CRT private key operations. It uses 256-bit registers to avoid CPU frequency scaling issues. The performance speedup for RSA2k signature on ICL is ~2x. Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/13750)
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