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Searched refs:reg_map (Results 1 – 10 of 10) sorted by relevance

/PHP-5.5/ext/pcre/pcrelib/sljit/
H A DsljitNativeX86_32.c107 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | reg_map[SLJIT_R2]; in sljit_emit_enter()
111 *inst++ = MOD_REG | (reg_map[SLJIT_S1] << 3) | reg_map[SLJIT_R1]; in sljit_emit_enter()
122 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S0] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
127 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S1] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
132 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S2] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
151 inst[1] = MOD_REG | (reg_map[TMP_REG1] << 3) | reg_map[SLJIT_SP]; in sljit_emit_enter()
402 *buf_ptr++ = reg_map[b & REG_MASK] | (reg_map[OFFS_REG(b)] << 3); in emit_x86_instruction()
416 *buf_ptr++ = reg_map[b & REG_MASK] | (reg_map[OFFS_REG(b)] << 3) | (immb << 6); in emit_x86_instruction()
453 *inst++ = MOD_REG | (reg_map[SLJIT_R2] << 3) | reg_map[SLJIT_R0]; in call_with_args()
499 POP_REG(reg_map[dst]); in sljit_emit_fast_enter()
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H A DsljitNativeTILEGX_64.c1425 FAIL_IF(ADD(reg_map[base], reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3])); in getput_arg()
1594 return ADD(reg_map[dst], reg_map[src2], ZERO); in emit_single_op()
1607 return ADD(reg_map[dst], reg_map[src2], ZERO); in emit_single_op()
1622 return ADD(reg_map[dst], reg_map[src2], ZERO); in emit_single_op()
1647 FAIL_IF(NOR(reg_map[dst], reg_map[src2], reg_map[src2])); in emit_single_op()
1656 FAIL_IF(CLZ(reg_map[dst], reg_map[src2])); in emit_single_op()
1714 FAIL_IF(ADD(reg_map[dst],reg_map[src1], reg_map[src2])); in emit_single_op()
1749 FAIL_IF(ADD(reg_map[dst], reg_map[src1], reg_map[src2])); in emit_single_op()
1832 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2])); in emit_single_op()
1863 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2])); in emit_single_op()
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H A DsljitNativeX86_64.c108 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
112 if (reg_map[i] >= 8) in sljit_emit_enter()
118 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
122 if (reg_map[i] >= 8) in sljit_emit_enter()
300 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_return()
304 if (reg_map[i] >= 8) in sljit_emit_return()
315 if (reg_map[i] >= 8) in sljit_emit_return()
561 …SLJIT_COMPILE_ASSERT(reg_map[SLJIT_R1] == 6 && reg_map[SLJIT_R0] < 8 && reg_map[SLJIT_R2] < 8, arg… in call_with_args()
575 …SLJIT_COMPILE_ASSERT(reg_map[SLJIT_R1] == 2 && reg_map[SLJIT_R0] < 8 && reg_map[SLJIT_R2] < 8, arg… in call_with_args()
605 if (reg_map[dst] < 8) { in sljit_emit_fast_enter()
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H A DsljitNativeARM_32.c62 #define RM(rm) (reg_map[rm])
845 push |= 1 << reg_map[i]; in sljit_emit_enter()
848 push |= 1 << reg_map[i]; in sljit_emit_enter()
903 pop |= 1 << reg_map[i]; in sljit_emit_return()
906 pop |= 1 << reg_map[i]; in sljit_emit_return()
1084 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12); in emit_single_op()
1089 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src1] << 8) | reg_map[src2])); in emit_single_op()
1091 FAIL_IF(push_inst(compiler, mul_inst | (reg_map[src2] << 8) | reg_map[src1])); in emit_single_op()
1827 | reg_map[SLJIT_R1]); in sljit_emit_op0()
1834 | reg_map[TMP_REG1]); in sljit_emit_op0()
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H A DsljitNativeX86_common.c755 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
761 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
762 && reg_map[SLJIT_R1] < 7 in sljit_emit_op0()
813 *inst = MOD_REG | ((op >= SLJIT_UDIVMOD) ? reg_map[TMP_REG1] : reg_map[SLJIT_R1]); in sljit_emit_op0()
912 if (reg_map[src] >= 4) { in emit_mov_byte()
925 if (reg_map[dst] < 4) { in emit_mov_byte()
1223 *inst++ = MOD_REG | (reg_map[dst_r] << 3) | reg_map[TMP_REG1]; in emit_clz()
2231 return reg_map[reg];
2736 if (reg_map[dst] <= 4) {
2748 *inst = MOD_REG | (reg_map[dst] << 3) | reg_map[dst];
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H A DsljitNativeARM_T2_32.c53 #define RD3(rd) (reg_map[rd])
62 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
64 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
66 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
71 #define RM4(rm) (reg_map[rm])
724 if (reg_map[dst] <= 7) in emit_op_imm()
1211 pop |= 1 << reg_map[i]; in sljit_emit_return()
1214 pop |= 1 << reg_map[i]; in sljit_emit_return()
1260 | reg_map[SLJIT_R1]); in sljit_emit_op0()
1266 …SLJIT_COMPILE_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 12, bad_register_mapping); in sljit_emit_op0()
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H A DsljitNativeSPARC_common.c94 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
102 #define D(d) (reg_map[d] << 25)
104 #define S1(s1) (reg_map[s1] << 14)
105 #define S2(s2) (reg_map[s2])
112 #define DR(dr) (reg_map[dr])
920 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeARM_64.c46 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
51 #define RD(rd) (reg_map[rd])
52 #define RT(rt) (reg_map[rt])
53 #define RN(rn) (reg_map[rn] << 5)
54 #define RT2(rt2) (reg_map[rt2] << 10)
55 #define RM(rm) (reg_map[rm] << 16)
1518 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativePPC_common.c104 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
111 #define D(d) (reg_map[d] << 21)
112 #define S(s) (reg_map[s] << 21)
113 #define A(a) (reg_map[a] << 16)
114 #define B(b) (reg_map[b] << 11)
115 #define C(c) (reg_map[c] << 6)
1662 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeMIPS_common.c71 static SLJIT_CONST sljit_ub reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
79 #define S(s) (reg_map[s] << 21)
80 #define T(t) (reg_map[t] << 16)
81 #define D(d) (reg_map[d] << 11)
92 #define DR(dr) (reg_map[dr])
1254 return reg_map[reg]; in sljit_get_register_index()

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