/PHP-8.3/ext/pcre/pcre2lib/sljit/ |
H A D | sljitNativeX86_64.c | 125 if ((b & OFFS_REG_MASK) && (immb & 0x3) == 0 && reg_lmap[OFFS_REG(b)] != 5) in emit_x86_instruction() 126 b = SLJIT_MEM | OFFS_REG(b) | TO_OFFS_REG(b & REG_MASK); in emit_x86_instruction() 139 if (reg_map[OFFS_REG(b)] >= 8) in emit_x86_instruction() 242 *buf_ptr++ = U8(reg_lmap_b | (reg_lmap[OFFS_REG(b)] << 3)); in emit_x86_instruction() 259 *buf_ptr++ = U8(reg_lmap_b | (reg_lmap[OFFS_REG(b)] << 3) | (immb << 6)); in emit_x86_instruction() 976 if (!(type & SLJIT_MEM_STORE) && (regs[0] == (mem & REG_MASK) || regs[0] == OFFS_REG(mem))) { in sljit_emit_mem() 977 if (regs[1] == (mem & REG_MASK) || regs[1] == OFFS_REG(mem)) { in sljit_emit_mem() 979 EMIT_MOV(compiler, TMP_REG1, 0, OFFS_REG(mem), 0); in sljit_emit_mem() 981 if (regs[1] == OFFS_REG(mem)) in sljit_emit_mem() 1003 …? REX_R : 0) | ((reg_map[mem & REG_MASK] >= 8) ? REX_B : 0) | ((reg_map[OFFS_REG(mem)] >= 8) ? REX… in sljit_emit_mem() [all …]
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H A D | sljitNativeX86_32.c | 93 if ((b & OFFS_REG_MASK) && (immb & 0x3) == 0 && reg_map[OFFS_REG(b)] != 5) in emit_x86_instruction() 94 b = SLJIT_MEM | OFFS_REG(b) | TO_OFFS_REG(b & REG_MASK); in emit_x86_instruction() 187 *buf_ptr++ = U8(reg_map_b | (reg_map[OFFS_REG(b)] << 3)); in emit_x86_instruction() 204 *buf_ptr++ = U8(reg_map_b | (reg_map[OFFS_REG(b)] << 3) | (immb << 6)); in emit_x86_instruction() 1225 if (!(type & SLJIT_MEM_STORE) && (regs[0] == (mem & REG_MASK) || regs[0] == OFFS_REG(mem))) { in sljit_emit_mem() 1226 if (regs[1] == (mem & REG_MASK) || regs[1] == OFFS_REG(mem)) { in sljit_emit_mem() 1228 EMIT_MOV(compiler, TMP_REG1, 0, OFFS_REG(mem), 0); in sljit_emit_mem() 1230 if (regs[1] == OFFS_REG(mem)) in sljit_emit_mem() 1264 inst[2] = U8(memw << 6) | U8(reg_map[OFFS_REG(mem)] << 3) | reg_map[mem & REG_MASK]; in sljit_emit_mem()
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H A D | sljitNativePPC_common.c | 1149 offs_reg = OFFS_REG(arg); in emit_op_mem() 1152 FAIL_IF(push_inst(compiler, SLWI_W(argw) | S(OFFS_REG(arg)) | A(tmp_reg))); in emit_op_mem() 1330 return push_inst(compiler, DCBT | A(src & REG_MASK) | B(OFFS_REG(src))); in emit_prefetch() 1332 FAIL_IF(push_inst(compiler, SLWI_W(srcw) | S(OFFS_REG(src)) | A(TMP_REG1))); in emit_prefetch() 1936 FAIL_IF(push_inst(compiler, SLWI_W(dstw) | S(OFFS_REG(dst)) | A(TMP_REG1))); in sljit_emit_fop1_conv_sw_from_f64() 1940 dstw = OFFS_REG(dst); in sljit_emit_fop1_conv_sw_from_f64() 2619 FAIL_IF(push_inst(compiler, SLWI_W(memw) | S(OFFS_REG(mem)) | A(TMP_REG1))); in sljit_emit_mem() 2622 FAIL_IF(push_inst(compiler, ADD | D(TMP_REG1) | A(mem & REG_MASK) | B(OFFS_REG(mem)))); in sljit_emit_mem() 2736 …FAIL_IF(push_inst(compiler, INST_CODE_AND_DST(inst, 0, reg) | A(mem & REG_MASK) | B(OFFS_REG(mem))… in sljit_emit_mem_update() 2792 …_inst(compiler, INST_CODE_AND_DST(inst, DOUBLE_DATA, freg) | A(mem & REG_MASK) | B(OFFS_REG(mem))); in sljit_emit_fmem_update()
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H A D | sljitLir.c | 126 #define OFFS_REG(reg) (((reg) >> 8) & REG_MASK) macro 747 (((exp) & SLJIT_MEM) && (((exp) & REG_MASK) == reg || OFFS_REG(exp) == reg)) 838 if (!(FUNCTION_CHECK_IS_REG(OFFS_REG(p)))) in function_check_src_mem() 841 if (CHECK_IF_VIRTUAL_REGISTER(OFFS_REG(p))) in function_check_src_mem() 950 sljit_verbose_reg(compiler, OFFS_REG(p)); in sljit_verbose_param() 972 sljit_verbose_reg(compiler, OFFS_REG(p)); in sljit_verbose_fparam()
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H A D | sljitNativeRISCV_common.c | 944 FAIL_IF(push_inst(compiler, SLLI | RD(TMP_REG3) | RS1(OFFS_REG(arg)) | IMM_I(argw))); in getput_arg() 950 …FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG3) | RS1(base) | RS2(!argw ? OFFS_REG(arg) : TMP_REG3)… in getput_arg() 954 … FAIL_IF(push_inst(compiler, ADD | RD(tmp_r) | RS1(base) | RS2(!argw ? OFFS_REG(arg) : TMP_REG3))); in getput_arg() 1008 FAIL_IF(push_inst(compiler, SLLI | RD(tmp_r) | RS1(OFFS_REG(arg)) | IMM_I(argw))); in emit_op_mem() 1012 FAIL_IF(push_inst(compiler, ADD | RD(tmp_r) | RS1(base) | RS2(OFFS_REG(arg)))); in emit_op_mem() 2670 FAIL_IF(push_inst(compiler, SLLI | RD(TMP_REG1) | RS1(OFFS_REG(mem)) | IMM_I(memw))); in sljit_emit_mem() 2673 FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG1) | RS1(mem & REG_MASK) | RS2(OFFS_REG(mem)))); in sljit_emit_mem()
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H A D | sljitNativeMIPS_common.c | 1282 … FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3))); in getput_arg() 1288 …FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | D(TMP_REG3), … in getput_arg() 1292 …FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(!argw ? OFFS_REG(arg) : TMP_REG3) | DA(tmp_ar), t… in getput_arg() 1352 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | DA(tmp_ar) | SH_IMM(argw), tmp_ar)); in emit_op_mem() 1356 FAIL_IF(push_inst(compiler, ADDU_W | S(base) | T(OFFS_REG(arg)) | DA(tmp_ar), tmp_ar)); in emit_op_mem() 2246 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(src)) | D(TMP_REG1) | SH_IMM(srcw), DR(TMP_REG1))); in emit_prefetch() 2250 return push_inst(compiler, PREFX | S(src & REG_MASK) | T(OFFS_REG(src)), MOVABLE_INS); in emit_prefetch() 3380 … FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG1) | SH_IMM(argw), DR(TMP_REG1))); in update_mem_addr() 3383 …FAIL_IF(push_inst(compiler, ADDU_W | S(arg & REG_MASK) | T(OFFS_REG(arg)) | D(TMP_REG1), DR(TMP_RE… in update_mem_addr()
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H A D | sljitNativeARM_64.c | 914 | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (argw ? (1 << 12) : 0)); in emit_op_mem() 916 …FAIL_IF(push_inst(compiler, ADD | RD(tmp_reg) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | ((sljit_i… in emit_op_mem() 1636 | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (argw ? (1 << 12) : 0)); in emit_fop_mem() 1638 …FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG1) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | ((sljit_… in emit_fop_mem() 2177 …FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG1) | RN(mem & REG_MASK) | RM(OFFS_REG(mem)) | ((sljit_… in sljit_emit_mem()
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H A D | sljitNativeS390X.c | 940 index = gpr(OFFS_REG(mem)); in make_addr_bxy() 973 index = gpr(OFFS_REG(mem)); in make_addr_bx() 1214 else if (dst == (src2 & REG_MASK) || (dst == OFFS_REG(src2))) { in emit_rx() 1227 index = gpr(OFFS_REG(src2)); in emit_rx() 1270 index = gpr(OFFS_REG(dst)); in emit_siy() 3612 offs = gpr(OFFS_REG(mem)); in sljit_emit_mem()
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H A D | sljitNativeSPARC_common.c | 704 | S1(arg & REG_MASK) | ((arg & OFFS_REG_MASK) ? S2(OFFS_REG(arg)) : IMM(argw)), in getput_arg_fast() 758 … if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg)) in getput_arg() 762 …FAIL_IF(push_inst(compiler, SLL_W | D(arg2) | S1(OFFS_REG(arg)) | IMM_ARG | (sljit_ins)argw, DR(ar… in getput_arg()
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H A D | sljitNativeARM_T2_32.c | 1059 other_r = OFFS_REG(arg); in emit_op_mem() 1950 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | (… in emit_fop_mem() 2795 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(mem & REG_MASK) | RM4(OFFS_REG(mem)) | (… in sljit_emit_mem() 2882 …FAIL_IF(push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(mem & REG_MASK) | RM4(OFFS_REG(mem)) | (… in sljit_emit_mem() 3003 …return push_inst32(compiler, ADD_W | RD4(TMP_REG1) | RN4(arg & REG_MASK) | RM4(OFFS_REG(arg)) | ((… in update_mem_addr()
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H A D | sljitNativeARM_32.c | 1832 offset_reg = OFFS_REG(arg); in emit_op_mem() 2358 …FAIL_IF(push_inst(compiler, ADD | RD(TMP_REG2) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | (((sljit… in emit_fop_mem() 3189 …return push_inst(compiler, ADD | RD(TMP_REG1) | RN(arg & REG_MASK) | RM(OFFS_REG(arg)) | ((sljit_u… in update_mem_addr() 3503 …inst = EMIT_DATA_TRANSFER(flags, 1, reg, mem & REG_MASK, RM(OFFS_REG(mem)) | ((sljit_uw)memw << 7)… in sljit_emit_mem_update()
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