IMM (reference) in projects: PHP-8.3 - OpenGrok search results

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Searched refs:IMM (Results 1 – 8 of 8) sorted by relevance

/PHP-8.3/ext/pcre/pcre2lib/sljit/
H A D	sljitNativeSPARC_32.c	30 return push_inst(compiler, OR \| D(dst) \| S1(0) \| IMM(imm), DR(dst)); in load_immediate() 36 #define ARG2(flags, src2) ((flags & SRC2_IMM) ? IMM(src2) : S2(src2)) 55 return push_inst(compiler, AND \| D(dst) \| S1(src2) \| IMM(0xff), DR(dst)); in emit_single_op() 56 FAIL_IF(push_inst(compiler, SLL \| D(dst) \| S1(src2) \| IMM(24), DR(dst))); in emit_single_op() 57 return push_inst(compiler, SRA \| D(dst) \| S1(dst) \| IMM(24), DR(dst)); in emit_single_op() 66 FAIL_IF(push_inst(compiler, SLL \| D(dst) \| S1(src2) \| IMM(16), DR(dst))); in emit_single_op() 81 FAIL_IF(push_inst(compiler, OR \| D(dst) \| S1(0) \| IMM(32), UNMOVABLE_INS)); in emit_single_op() 82 FAIL_IF(push_inst(compiler, OR \| D(dst) \| S1(0) \| IMM(-1), DR(dst))); in emit_single_op() 86 FAIL_IF(push_inst(compiler, SLL \| D(TMP_REG1) \| S1(TMP_REG1) \| IMM(1), DR(TMP_REG1))); in emit_single_op() 88 return push_inst(compiler, ADD \| D(dst) \| S1(dst) \| IMM(1), UNMOVABLE_INS); in emit_single_op() [all …]
H A D	sljitNativeMIPS_64.c	38 return push_inst(compiler, ORI \| SA(0) \| TA(dst_ar) \| IMM(imm), dst_ar); in load_immediate() 41 return push_inst(compiler, ADDIU \| SA(0) \| TA(dst_ar) \| IMM(imm), dst_ar); in load_immediate() 44 FAIL_IF(push_inst(compiler, LUI \| TA(dst_ar) \| IMM(imm >> 16), dst_ar)); in load_immediate() 45 …return (imm & 0xffff) ? push_inst(compiler, ORI \| SA(dst_ar) \| TA(dst_ar) \| IMM(imm), dst_ar) : SL… in load_immediate() 79 FAIL_IF(push_inst(compiler, LUI \| TA(dst_ar) \| IMM(uimm >> 48), dst_ar)); in load_immediate() 81 FAIL_IF(push_inst(compiler, ORI \| SA(dst_ar) \| TA(dst_ar) \| IMM(uimm >> 32), dst_ar)); in load_immediate() 114 FAIL_IF(push_inst(compiler, ORI \| SA(dst_ar) \| TA(dst_ar) \| IMM(uimm >> 48), dst_ar)); in load_immediate() 123 FAIL_IF(push_inst(compiler, LUI \| T(dst) \| IMM(init_value >> 48), DR(dst))); in emit_const() 124 FAIL_IF(push_inst(compiler, ORI \| S(dst) \| T(dst) \| IMM(init_value >> 32), DR(dst))); in emit_const() 126 FAIL_IF(push_inst(compiler, ORI \| S(dst) \| T(dst) \| IMM(init_value >> 16), DR(dst))); in emit_const() [all …]
H A D	sljitNativeMIPS_32.c	32 return push_inst(compiler, ORI \| SA(0) \| TA(dst_ar) \| IMM(imm), dst_ar); in load_immediate() 35 return push_inst(compiler, ADDIU \| SA(0) \| TA(dst_ar) \| IMM(imm), dst_ar); in load_immediate() 37 FAIL_IF(push_inst(compiler, LUI \| TA(dst_ar) \| IMM(imm >> 16), dst_ar)); in load_immediate() 43 FAIL_IF(push_inst(compiler, LUI \| T(dst) \| IMM(init_value >> 16), DR(dst))); in emit_const() 44 return push_inst(compiler, ORI \| S(dst) \| T(dst) \| IMM(init_value), DR(dst)); in emit_const() 127 FAIL_IF(push_inst(compiler, ADDIU \| S(SLJIT_SP) \| T(SLJIT_SP) \| IMM(-16), DR(SLJIT_SP))); in call_with_args() 152 ins = SDC1 \| S(SLJIT_SP) \| FT(float_arg_count) \| IMM(offsets_ptr); in call_with_args() 162 ins = SWC1 \| S(SLJIT_SP) \| FT(float_arg_count) \| IMM(offsets_ptr); in call_with_args() 170 ins = SW \| S(SLJIT_SP) \| T(word_arg_count) \| IMM(*offsets_ptr); in call_with_args() 246 PTR_FAIL_IF(push_inst(compiler, ADDIU \| S(SLJIT_SP) \| T(SLJIT_SP) \| IMM(extra_space), in sljit_emit_call() [all …]
H A D	sljitNativePPC_64.c	50 return push_inst(compiler, ADDI \| D(reg) \| A(0) \| IMM(imm)); in load_immediate() 53 return push_inst(compiler, ORI \| S(TMP_ZERO) \| A(reg) \| IMM(imm)); in load_immediate() 56 FAIL_IF(push_inst(compiler, ADDIS \| D(reg) \| A(0) \| IMM(imm >> 16))); in load_immediate() 75 FAIL_IF(push_inst(compiler, ORI \| S(reg) \| A(reg) \| IMM(tmp >> 32))); in load_immediate() 91 FAIL_IF(push_inst(compiler, ADDI \| D(reg) \| A(0) \| IMM(tmp >> 48))); in load_immediate() 111 FAIL_IF(push_inst(compiler, ORI \| S(reg) \| A(reg) \| IMM(imm >> 32))); in load_immediate() 113 FAIL_IF(push_inst(compiler, ORIS \| S(reg) \| A(reg) \| IMM(imm >> 16))); in load_immediate() 114 return push_inst(compiler, ORI \| S(reg) \| A(reg) \| IMM(imm)); in load_immediate() 381 FAIL_IF(push_inst(compiler, ORI \| S(src1) \| A(dst) \| IMM(imm))); in emit_single_op() 399 FAIL_IF(push_inst(compiler, XORI \| S(src1) \| A(dst) \| IMM(imm))); in emit_single_op() [all …]
H A D	sljitNativeMIPS_common.c	122 #define IMM(imm) ((sljit_ins)(imm) & 0xffff) macro 544 inst[0] = LUI \| T(reg) \| IMM(addr >> 16); in load_addr_to_reg() 548 inst[0] = LUI \| T(reg) \| IMM(addr >> 16); in load_addr_to_reg() 552 inst[0] = LUI \| T(reg) \| IMM(addr >> 32); in load_addr_to_reg() 553 inst[1] = ORI \| S(reg) \| T(reg) \| IMM((addr >> 16) & 0xffff); in load_addr_to_reg() 558 inst[0] = LUI \| T(reg) \| IMM(addr >> 48); in load_addr_to_reg() 567 inst[1] = ORI \| S(reg) \| T(reg) \| IMM(addr & 0xffff); in load_addr_to_reg() 3413 #define MEM16_IMM_FIRST(memw) IMM((memw) + 1) 3414 #define MEM16_IMM_SECOND(memw) IMM(memw) 3418 #define MEM16_IMM_FIRST(memw) IMM(memw) [all …]
H A D	sljitNativePPC_32.c	32 return push_inst(compiler, ADDI \| D(reg) \| A(0) \| IMM(imm)); in load_immediate() 35 return push_inst(compiler, ORI \| S(TMP_ZERO) \| A(reg) \| IMM(imm)); in load_immediate() 37 FAIL_IF(push_inst(compiler, ADDIS \| D(reg) \| A(0) \| IMM(imm >> 16))); in load_immediate() 38 return (imm & 0xffff) ? push_inst(compiler, ORI \| S(reg) \| A(reg) \| IMM(imm)) : SLJIT_SUCCESS; in load_immediate() 101 FAIL_IF(push_inst(compiler, ADDI \| D(TMP_REG1) \| A(dst) \| IMM(-32))); in emit_single_op() 228 FAIL_IF(push_inst(compiler, ORI \| S(src1) \| A(dst) \| IMM(imm))); in emit_single_op() 229 return push_inst(compiler, ORIS \| S(dst) \| A(dst) \| IMM(imm >> 16)); in emit_single_op() 246 FAIL_IF(push_inst(compiler, XORI \| S(src1) \| A(dst) \| IMM(imm))); in emit_single_op() 247 return push_inst(compiler, XORIS \| S(dst) \| A(dst) \| IMM(imm >> 16)); in emit_single_op() 324 FAIL_IF(push_inst(compiler, ADDIS \| D(reg) \| A(0) \| IMM(init_value >> 16))); in emit_const() [all …]
H A D	sljitNativeSPARC_common.c	125 #define IMM(imm) (((sljit_ins)(imm) & 0x1fff) \| IMM_ARG) macro 527 FAIL_IF(push_inst(compiler, SAVE \| D(SLJIT_SP) \| S1(SLJIT_SP) \| IMM(-local_size), UNMOVABLE_INS)); in sljit_emit_enter() 555 … FAIL_IF(push_inst(compiler, STW \| DA(reg_index) \| S1(SLJIT_SP) \| IMM(float_offset), MOVABLE_INS)); in sljit_emit_enter() 609 FAIL_IF(push_inst(compiler, LDUW \| DA(tmp) \| S1A(30) \| IMM(args_offset), tmp)); in sljit_emit_enter() 637 FAIL_IF(push_inst(compiler, JMPL \| D(0) \| S1A(31) \| IMM(8), UNMOVABLE_INS)); in sljit_emit_return_void() 651 FAIL_IF(push_inst(compiler, JMPL \| D(0) \| S1A(31) \| IMM(8), UNMOVABLE_INS)); in sljit_emit_return() 704 \| S1(arg & REG_MASK) \| ((arg & OFFS_REG_MASK) ? S2(OFFS_REG(arg)) : IMM(argw)), in getput_arg_fast() 969 FAIL_IF(push_inst(compiler, SRA \| D(TMP_REG1) \| S1(SLJIT_R0) \| IMM(31), DR(TMP_REG1))); in sljit_emit_op0() 1102 FAIL_IF(push_inst(compiler, JMPL \| D(0) \| S1(TMP_LINK) \| IMM(8), UNMOVABLE_INS)); in sljit_emit_op_src() 1600 FAIL_IF(push_inst(compiler, OR \| D(reg) \| S1(0) \| IMM(1), UNMOVABLE_INS)); in sljit_emit_op_flags() [all …]
H A D	sljitNativePPC_common.c	128 #define IMM(imm) ((sljit_ins)(imm) & 0xffff) macro 381 inst[0] = ORIS \| S(TMP_ZERO) \| A(reg) \| IMM(addr >> 16); in put_label_set() 386 inst[0] = ORI \| S(TMP_ZERO) \| A(reg) \| IMM(addr >> 32); in put_label_set() 389 inst[0] = ORIS \| S(TMP_ZERO) \| A(reg) \| IMM(addr >> 48); in put_label_set() 390 inst[1] = ORI \| S(reg) \| A(reg) \| IMM((addr >> 32) & 0xffff); in put_label_set() 395 inst[2] = ORIS \| S(reg) \| A(reg) \| IMM((addr >> 16) & 0xffff); in put_label_set() 399 inst[1] = ORI \| S(reg) \| A(reg) \| IMM(addr & 0xffff); in put_label_set() 801 FAIL_IF(push_inst(compiler, STFD \| FS(i) \| A(base) \| IMM(offset))); in sljit_emit_enter() 806 FAIL_IF(push_inst(compiler, STFD \| FS(i) \| A(base) \| IMM(offset))); in sljit_emit_enter() 909 FAIL_IF(push_inst(compiler, LFD \| FS(i) \| A(base) \| IMM(offset))); in emit_stack_frame_release() [all …]

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