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Searched refs:reg_map (Results 1 – 13 of 13) sorted by relevance

/PHP-8.2/ext/pcre/pcre2lib/sljit/
H A DsljitNativeX86_64.c120 if (reg_map[b & REG_MASK] >= 8) in emit_x86_instruction()
141 if (reg_map[b] >= 8) in emit_x86_instruction()
172 if (reg_map[a] >= 8) in emit_x86_instruction()
396 if (reg_map[i] >= 8) in sljit_emit_enter()
406 if (reg_map[i] >= 8) in sljit_emit_enter()
631 if (reg_map[i] >= 8) in emit_stack_frame_release()
642 if (reg_map[i] >= 8) in emit_stack_frame_release()
677 SLJIT_ASSERT(reg_map[SLJIT_R1] == 6 && reg_map[SLJIT_R3] == 1 && reg_map[TMP_REG1] == 2); in call_with_args()
713 …SLJIT_ASSERT(reg_map[SLJIT_R3] == 1 && reg_map[SLJIT_R1] == 2 && reg_map[SLJIT_R2] == 8 && reg_map… in call_with_args()
847 if (reg_map[dst] < 8) { in sljit_emit_fast_enter()
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H A DsljitNativeX86_32.c348 PUSH_REG(reg_map[TMP_REG1]); in sljit_emit_enter()
350 PUSH_REG(reg_map[SLJIT_S2]); in sljit_emit_enter()
352 PUSH_REG(reg_map[SLJIT_S1]); in sljit_emit_enter()
354 PUSH_REG(reg_map[SLJIT_S0]); in sljit_emit_enter()
584 POP_REG(reg_map[SLJIT_S0]); in emit_stack_frame_release()
586 POP_REG(reg_map[SLJIT_S1]); in emit_stack_frame_release()
588 POP_REG(reg_map[SLJIT_S2]); in emit_stack_frame_release()
589 POP_REG(reg_map[TMP_REG1]); in emit_stack_frame_release()
732 *inst++ = U8(MOD_REG | (reg_map[SLJIT_R2] << 3) | reg_map[SLJIT_R0]); in c_fast_call_with_args()
1368 POP_REG(reg_map[dst]); in sljit_emit_fast_enter()
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H A DsljitNativeX86_common.c988 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
989 && reg_map[SLJIT_R1] == 2 in sljit_emit_op0()
993 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
994 && reg_map[SLJIT_R1] < 7 in sljit_emit_op0()
1044 *inst = MOD_REG | ((op >= SLJIT_DIVMOD_UW) ? reg_map[TMP_REG1] : reg_map[SLJIT_R1]); in sljit_emit_op0()
1144 if (reg_map[src] >= 4) { in emit_mov_byte()
1157 if (reg_map[dst] < 4) { in emit_mov_byte()
2371 return reg_map[reg];
2825 if (reg_map[dst] <= 4) {
2837 *inst = U8(MOD_REG | (reg_map[dst] << 3) | reg_map[dst]);
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H A DsljitNativeARM_T2_32.c62 #define RD3(rd) ((sljit_ins)reg_map[rd])
71 …(((sljit_ins)reg_map[rn] << 3) | ((sljit_ins)reg_map[rd] & 0x7) | (((sljit_ins)reg_map[rd] & 0x8) …
73 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
75 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
1102 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
1105 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
1176 SLJIT_ASSERT(reg_map[tmp] <= 7); in sljit_emit_enter()
1392 if (reg_map[lr_dst] <= 7) in emit_stack_frame_release()
1498 SLJIT_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 3); in sljit_emit_op0()
1727 return reg_map[reg]; in sljit_get_register_index()
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H A DsljitNativeARM_32.c71 #define RM(rm) ((sljit_uw)reg_map[rm])
72 #define RM8(rm) ((sljit_uw)reg_map[rm] << 8)
73 #define RD(rd) ((sljit_uw)reg_map[rd] << 12)
282 SLJIT_ASSERT(reg_map[TMP_REG1] != 14); in emit_blx()
1069 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
1072 imm |= (sljit_uw)1 << reg_map[i]; in sljit_emit_enter()
1074 SLJIT_ASSERT(reg_map[TMP_REG2] == 14); in sljit_emit_enter()
1247 SLJIT_ASSERT(reg_map[TMP_REG2] == 14); in emit_stack_frame_release()
1953 SLJIT_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 3); in sljit_emit_op0()
2138 return reg_map[reg]; in sljit_get_register_index()
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H A DsljitNativeARM_64.c46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
55 #define RD(rd) ((sljit_ins)reg_map[rd])
56 #define RT(rt) ((sljit_ins)reg_map[rt])
57 #define RN(rn) ((sljit_ins)reg_map[rn] << 5)
58 #define RT2(rt2) ((sljit_ins)reg_map[rt2] << 10)
59 #define RM(rm) ((sljit_ins)reg_map[rm] << 16)
1423 SLJIT_ASSERT(reg_map[1] == 0 && reg_map[3] == 2 && reg_map[5] == 4); in sljit_emit_op_src()
1445 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeSPARC_common.c100 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
112 #define D(d) ((sljit_ins)reg_map[d] << 25)
116 #define S1(s1) ((sljit_ins)reg_map[s1] << 14)
119 #define S2(s2) ((sljit_ins)reg_map[s2])
127 #define DR(dr) (reg_map[dr])
128 #define DRF(dr, flags) ((sljit_s32)(reg_map[dr] | ((flags) & SET_FLAGS)))
1118 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativePPC_common.c107 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
118 #define D(d) ((sljit_ins)reg_map[d] << 21)
119 #define S(s) ((sljit_ins)reg_map[s] << 21)
120 #define A(a) ((sljit_ins)reg_map[a] << 16)
121 #define B(b) ((sljit_ins)reg_map[b] << 11)
122 #define C(c) ((sljit_ins)reg_map[c] << 6)
1709 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeSPARC_32.c153 reg = reg_map[*src & REG_MASK]; in call_with_args()
H A DsljitNativeMIPS_common.c82 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
104 #define S(s) ((sljit_ins)reg_map[s] << 21)
105 #define T(t) ((sljit_ins)reg_map[t] << 16)
106 #define D(d) ((sljit_ins)reg_map[d] << 11)
117 #define DR(dr) (reg_map[dr])
1707 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeS390X.c50 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 4] = { variable
128 #define R0(r) ((sljit_ins)reg_map[r])
143 SLJIT_ASSERT(r >= 0 && r < (sljit_s32)(sizeof(reg_map) / sizeof(reg_map[0]))); in gpr()
144 return reg_map[r]; in gpr()
H A DsljitNativeMIPS_32.c455 SLJIT_ASSERT(reg_map[TMP_REG1] == 4 && freg_map[TMP_FREG1] == 12); in call_with_args()
H A DsljitNativeMIPS_64.c575 SLJIT_ASSERT(reg_map[TMP_REG1] == 4 && freg_map[TMP_FREG1] == 12); in call_with_args()

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