Lines Matching refs:freg
2460 sljit_s32 freg, sljit_f32 value) in sljit_emit_fset32() argument
2472 CHECK(check_sljit_emit_fset32(compiler, freg, value)); in sljit_emit_fset32()
2482 …return push_inst32(compiler, (VMOV_F32 ^ (1 << 6)) | ((ins & 0xf0) << 12) | VD4(freg) | (ins & 0xf… in sljit_emit_fset32()
2488 return push_inst32(compiler, VMOV | VN4(freg) | RT4(TMP_REG1)); in sljit_emit_fset32()
2492 sljit_s32 freg, sljit_f64 value) in sljit_emit_fset64() argument
2504 CHECK(check_sljit_emit_fset64(compiler, freg, value)); in sljit_emit_fset64()
2514 …return push_inst32(compiler, (VMOV_F32 ^ (1 << 6)) | (1 << 8) | ((ins & 0xf0) << 12) | VD4(freg) |… in sljit_emit_fset64()
2521 return push_inst32(compiler, VMOV2 | RN4(TMP_REG1) | RT4(TMP_REG1) | VM4(freg)); in sljit_emit_fset64()
2524 return push_inst32(compiler, VMOV2 | RN4(TMP_REG2) | RT4(TMP_REG1) | VM4(freg)); in sljit_emit_fset64()
2528 sljit_s32 freg, sljit_s32 reg) in sljit_emit_fcopy() argument
2534 CHECK(check_sljit_emit_fcopy(compiler, op, freg, reg)); in sljit_emit_fcopy()
2540 inst = VMOV2 | RN4(reg) | RT4(reg2) | VM4(freg); in sljit_emit_fcopy()
2542 inst = VMOV | VN4(freg) | RT4(reg); in sljit_emit_fcopy()
3502 sljit_s32 freg, in sljit_emit_fmem() argument
3506 CHECK(check_sljit_emit_fmem(compiler, type, freg, mem, memw)); in sljit_emit_fmem()
3509 …iler, ((type ^ SLJIT_32) & SLJIT_32) | ((type & SLJIT_MEM_STORE) ? 0 : FPU_LOAD), freg, mem, memw); in sljit_emit_fmem()
3512 FAIL_IF(push_inst32(compiler, VMOV | (1 << 20) | VN4(freg) | RT4(TMP_REG2))); in sljit_emit_fmem()
3521 FAIL_IF(push_inst32(compiler, VMOV | (1 << 20) | VN4(freg) | 0x80 | RT4(TMP_REG2))); in sljit_emit_fmem()
3527 return push_inst32(compiler, VMOV | VN4(freg) | RT4(TMP_REG2)); in sljit_emit_fmem()
3535 return push_inst32(compiler, VMOV2 | VM4(freg) | RT4(TMP_REG2) | RN4(TMP_REG1)); in sljit_emit_fmem()
3570 static SLJIT_INLINE sljit_s32 simd_get_quad_reg_index(sljit_s32 freg) in simd_get_quad_reg_index() argument
3572 freg += freg & 0x1; in simd_get_quad_reg_index()
3574 SLJIT_ASSERT((freg_map[freg] & 0x1) == (freg <= SLJIT_NUMBER_OF_SCRATCH_FLOAT_REGISTERS)); in simd_get_quad_reg_index()
3576 if (freg <= SLJIT_NUMBER_OF_SCRATCH_FLOAT_REGISTERS) in simd_get_quad_reg_index()
3577 freg--; in simd_get_quad_reg_index()
3579 return freg; in simd_get_quad_reg_index()
3582 #define SLJIT_QUAD_OTHER_HALF(freg) ((((freg) & 0x1) << 1) - 1) argument
3585 sljit_s32 freg, in sljit_emit_simd_mov() argument
3594 CHECK(check_sljit_emit_simd_mov(compiler, type, freg, srcdst, srcdstw)); in sljit_emit_simd_mov()
3608 freg = simd_get_quad_reg_index(freg); in sljit_emit_simd_mov()
3615 ins = VD4(srcdst) | VN4(freg) | VM4(freg); in sljit_emit_simd_mov()
3617 ins = VD4(freg) | VN4(srcdst) | VM4(srcdst); in sljit_emit_simd_mov()
3630 ins = ((type & SLJIT_SIMD_STORE) ? VST1 : VLD1) | VD4(freg) in sljit_emit_simd_mov()
3738 sljit_s32 freg, in sljit_emit_simd_replicate() argument
3746 CHECK(check_sljit_emit_simd_replicate(compiler, type, freg, src, srcw)); in sljit_emit_simd_replicate()
3760 freg = simd_get_quad_reg_index(freg); in sljit_emit_simd_replicate()
3763 return push_inst32(compiler, VMOV_i | ((reg_size == 4) ? (1 << 6) : 0) | VD4(freg)); in sljit_emit_simd_replicate()
3769 FAIL_IF(emit_fop_mem(compiler, FPU_LOAD | SLJIT_32, freg, src, srcw)); in sljit_emit_simd_replicate()
3770 src = freg; in sljit_emit_simd_replicate()
3771 } else if (freg != src) in sljit_emit_simd_replicate()
3772 FAIL_IF(push_inst32(compiler, VORR | VD4(freg) | VN4(src) | VM4(src))); in sljit_emit_simd_replicate()
3774 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_replicate()
3776 if (freg != src) in sljit_emit_simd_replicate()
3777 return push_inst32(compiler, VORR | VD4(freg) | VN4(src) | VM4(src)); in sljit_emit_simd_replicate()
3789 return push_inst32(compiler, VLD1_r | ins | VD4(freg) | RN4(src) | 0xf); in sljit_emit_simd_replicate()
3799 return push_inst32(compiler, VDUP_s | ins | VD4(freg) | (sljit_ins)freg_map[src]); in sljit_emit_simd_replicate()
3812 return push_inst32(compiler, VMOV_i | imm | VD4(freg)); in sljit_emit_simd_replicate()
3834 return push_inst32(compiler, VDUP | ins | VN4(freg) | RT4(src)); in sljit_emit_simd_replicate()
3838 sljit_s32 freg, sljit_s32 lane_index, in sljit_emit_simd_lane_mov() argument
3846 CHECK(check_sljit_emit_simd_lane_mov(compiler, type, freg, lane_index, srcdst, srcdstw)); in sljit_emit_simd_lane_mov()
3860 freg = simd_get_quad_reg_index(freg); in sljit_emit_simd_lane_mov()
3868 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_lane_mov()
3870 if (srcdst != freg) in sljit_emit_simd_lane_mov()
3871 FAIL_IF(push_inst32(compiler, VORR | VD4(freg) | VN4(srcdst) | VM4(srcdst))); in sljit_emit_simd_lane_mov()
3873 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_lane_mov()
3874 return push_inst32(compiler, VMOV_i | VD4(freg)); in sljit_emit_simd_lane_mov()
3877 if (srcdst == freg || (elem_size == 3 && srcdst == (freg + SLJIT_QUAD_OTHER_HALF(freg)))) { in sljit_emit_simd_lane_mov()
3878 FAIL_IF(push_inst32(compiler, VORR | ins | VD4(TMP_FREG2) | VN4(freg) | VM4(freg))); in sljit_emit_simd_lane_mov()
3884 FAIL_IF(push_inst32(compiler, VMOV_i | ins | VD4(freg))); in sljit_emit_simd_lane_mov()
3889 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_lane_mov()
3894 …return emit_fop_mem(compiler, ((type & SLJIT_SIMD_STORE) ? 0 : FPU_LOAD) | SLJIT_32, freg, srcdst,… in sljit_emit_simd_lane_mov()
3900 …return push_inst32(compiler, ((type & SLJIT_SIMD_STORE) ? VST1_s : VLD1_s) | ins | VD4(freg) | RN4… in sljit_emit_simd_lane_mov()
3906 return push_inst32(compiler, VORR | VD4(srcdst) | VN4(freg) | VM4(freg)); in sljit_emit_simd_lane_mov()
3907 return push_inst32(compiler, VMOV_F32 | SLJIT_32 | VD4(freg) | VM4(srcdst)); in sljit_emit_simd_lane_mov()
3911 if (freg_ebit_map[freg] == 0) { in sljit_emit_simd_lane_mov()
3913 freg = SLJIT_F64_SECOND(freg); in sljit_emit_simd_lane_mov()
3915 return push_inst32(compiler, VMOV_F32 | VD4(srcdst) | VM4(freg)); in sljit_emit_simd_lane_mov()
3918 …FAIL_IF(push_inst32(compiler, VMOV_s | (1 << 20) | ((sljit_ins)lane_index << 21) | VN4(freg) | RT4… in sljit_emit_simd_lane_mov()
3923 return push_inst32(compiler, VMOV_s | ((sljit_ins)lane_index << 21) | VN4(freg) | RT4(TMP_REG1)); in sljit_emit_simd_lane_mov()
3951 return push_inst32(compiler, VMOV_s | ins | VN4(freg) | RT4(srcdst)); in sljit_emit_simd_lane_mov()
3955 sljit_s32 freg, in sljit_emit_simd_lane_replicate() argument
3963 CHECK(check_sljit_emit_simd_lane_replicate(compiler, type, freg, src, src_lane_index)); in sljit_emit_simd_lane_replicate()
3975 freg = simd_get_quad_reg_index(freg); in sljit_emit_simd_lane_replicate()
3985 if (freg != src) in sljit_emit_simd_lane_replicate()
3986 FAIL_IF(push_inst32(compiler, VORR | VD4(freg) | VN4(src) | VM4(src))); in sljit_emit_simd_lane_replicate()
3988 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_lane_replicate()
3990 if (freg != src) in sljit_emit_simd_lane_replicate()
3991 return push_inst32(compiler, VORR | VD4(freg) | VN4(src) | VM4(src)); in sljit_emit_simd_lane_replicate()
4000 return push_inst32(compiler, VDUP_s | ins | VD4(freg) | VM4(src)); in sljit_emit_simd_lane_replicate()
4004 sljit_s32 freg, in sljit_emit_simd_extend() argument
4013 CHECK(check_sljit_emit_simd_extend(compiler, type, freg, src, srcw)); in sljit_emit_simd_extend()
4027 freg = simd_get_quad_reg_index(freg); in sljit_emit_simd_extend()
4032 FAIL_IF(push_inst32(compiler, VLD1 | (0x7 << 8) | VD4(freg) | RN4(src) | 0xf)); in sljit_emit_simd_extend()
4034 …er, VLD1_s | (sljit_ins)((reg_size - elem2_size + elem_size) << 10) | VD4(freg) | RN4(src) | 0xf)); in sljit_emit_simd_extend()
4035 src = freg; in sljit_emit_simd_extend()
4040 dst_reg = (reg_size == 4) ? freg : TMP_FREG2; in sljit_emit_simd_extend()
4049 return push_inst32(compiler, VORR | VD4(freg) | VN4(TMP_FREG2) | VM4(TMP_FREG2)); in sljit_emit_simd_extend()
4056 if (freg == src) { in sljit_emit_simd_extend()
4057 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_extend()
4058 FAIL_IF(push_inst32(compiler, VCVT_F64_F32 | VD4(freg) | VM4(src) | 0x20)); in sljit_emit_simd_extend()
4059 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_extend()
4060 return push_inst32(compiler, VCVT_F64_F32 | VD4(freg) | VM4(src)); in sljit_emit_simd_extend()
4063 FAIL_IF(push_inst32(compiler, VCVT_F64_F32 | VD4(freg) | VM4(src))); in sljit_emit_simd_extend()
4064 freg += SLJIT_QUAD_OTHER_HALF(freg); in sljit_emit_simd_extend()
4065 return push_inst32(compiler, VCVT_F64_F32 | VD4(freg) | VM4(src) | 0x20); in sljit_emit_simd_extend()
4069 sljit_s32 freg, in sljit_emit_simd_sign() argument
4078 CHECK(check_sljit_emit_simd_sign(compiler, type, freg, dst, dstw)); in sljit_emit_simd_sign()
4111 freg = simd_get_quad_reg_index(freg); in sljit_emit_simd_sign()
4116 FAIL_IF(push_inst32(compiler, ins | VD4(TMP_FREG2) | VM4(freg))); in sljit_emit_simd_sign()
