Lines Matching refs:uint64_t
17 typedef struct _ir_mem {uint64_t v;} ir_mem;
21 typedef uint64_t ir_mem;
47 ((uint64_t)(uint32_t)offset |
48 ((uint64_t)(uint8_t)base << 32) |
49 ((uint64_t)(uint8_t)index << 40) |
50 ((uint64_t)(uint8_t)shift << 48));
117 static bool aarch64_may_encode_logical_imm(uint64_t value, uint32_t type_size)
1193 } else if (((uint64_t)(val)) <= 0xffff) {
1194 | movz Rx(reg), #((uint64_t)(val))
1195 } else if (~((uint64_t)(val)) <= 0xffff) {
1196 | movn Rx(reg), #(~((uint64_t)(val)))
1197 } else if ((uint64_t)(val) & 0xffff) {
1198 | movz Rx(reg), #((uint64_t)(val) & 0xffff)
1199 if (((uint64_t)(val) >> 16) & 0xffff) {
1200 | movk Rx(reg), #(((uint64_t)(val) >> 16) & 0xffff), lsl #16
1202 if (((uint64_t)(val) >> 32) & 0xffff) {
1203 | movk Rx(reg), #(((uint64_t)(val) >> 32) & 0xffff), lsl #32
1205 if ((((uint64_t)(val) >> 48) & 0xffff)) {
1206 | movk Rx(reg), #(((uint64_t)(val) >> 48) & 0xffff), lsl #48
1208 } else if (((uint64_t)(val) >> 16) & 0xffff) {
1209 | movz Rx(reg), #(((uint64_t)(val) >> 16) & 0xffff), lsl #16
1210 if (((uint64_t)(val) >> 32) & 0xffff) {
1211 | movk Rx(reg), #(((uint64_t)(val) >> 32) & 0xffff), lsl #32
1213 if ((((uint64_t)(val) >> 48) & 0xffff)) {
1214 | movk Rx(reg), #(((uint64_t)(val) >> 48) & 0xffff), lsl #48
1216 } else if (((uint64_t)(val) >> 32) & 0xffff) {
1217 | movz Rx(reg), #(((uint64_t)(val) >> 32) & 0xffff), lsl #32
1218 if ((((uint64_t)(val) >> 48) & 0xffff)) {
1219 | movk Rx(reg), #(((uint64_t)(val) >> 48) & 0xffff), lsl #48
1222 | movz Rx(reg), #(((uint64_t)(val) >> 48) & 0xffff), lsl #48
1229 } else if (((uint64_t)(val)) <= 0xffff) {
1230 | movz Rw(reg), #((uint64_t)(val))
1231 } else if (~((uint64_t)(val)) <= 0xffff) {
1232 | movn Rw(reg), #(~((uint64_t)(val)))
1233 } else if ((uint64_t)(val) & 0xffff) {
1234 | movz Rw(reg), #((uint64_t)(val) & 0xffff)
1235 if (((uint64_t)(val) >> 16) & 0xffff) {
1236 | movk Rw(reg), #(((uint64_t)(val) >> 16) & 0xffff), lsl #16
1238 } else if (((uint64_t)(val) >> 16) & 0xffff) {
1239 | movz Rw(reg), #(((uint64_t)(val) >> 16) & 0xffff), lsl #16
1908 uint64_t val = ctx->ir_base[op2].val.u64;
1916 uint64_t val = ctx->ir_base[op2].val.u64;
1924 uint64_t val = ctx->ir_base[op2].val.u64;
2163 uint64_t mask = ctx->ir_base[insn->op2].val.u64 - 1;
2239 uint64_t mask = ctx->ir_base[insn->op2].val.u64 - 1;
6528 | movz Rx(IR_REG_INT_TMP), #((uint64_t)(addr) & 0xffff)
6529 | movk Rx(IR_REG_INT_TMP), #(((uint64_t)(addr) >> 16) & 0xffff), lsl #16
6530 | movk Rx(IR_REG_INT_TMP), #(((uint64_t)(addr) >> 32) & 0xffff), lsl #32
6531 | movk Rx(IR_REG_INT_TMP), #(((uint64_t)(addr) >> 48) & 0xffff), lsl #48
6572 code[0] = (code[0] & 0xffe0001f) | (uint32_t)((uint64_t)(addr) & 0xffff) << 5;
6573 code[1] = (code[1] & 0xffe0001f) | (uint32_t)(((uint64_t)(addr) >> 16) & 0xffff) << 5;
6574 code[2] = (code[2] & 0xffe0001f) | (uint32_t)(((uint64_t)(addr) >> 32) & 0xffff) << 5;
6575 code[3] = (code[3] & 0xffe0001f) | (uint32_t)(((uint64_t)(addr) >> 48) & 0xffff) << 5;
