Lines Matching refs:op2
49 #define IR_OP_NAME(name, flags, op1, op2, op3) #name, argument
291 #define _IR_OP_FLAGS(name, flags, op1, op2, op3) \ argument
292 IR_OP_FLAGS(ir_op_flag_ ## flags, ir_op_kind_ ## op1, ir_op_kind_ ## op2, ir_op_kind_ ## op3),
798 ir_ref ir_emit(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3) argument
805 insn->op2 = op2;
821 ir_ref ir_emit2(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2) argument
823 return ir_emit(ctx, opt, op1, op2, IR_UNUSED);
826 ir_ref ir_emit3(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3) argument
828 return ir_emit(ctx, opt, op1, op2, op3);
831 static ir_ref _ir_fold_cse(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3) argument
842 if (op2 > limit) {
843 limit = op2;
850 if (insn->opt == opt && insn->op1 == op1 && insn->op2 == op2 && insn->op3 == op3) {
919 ir_ref ir_folding(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3, ir_insn *op1_insn,… argument
966 op2_insn = ctx->ir_base + op2;
972 ctx->fold_insn.op2 = op2;
979 ref = _ir_fold_cse(ctx, opt, op1, op2, op3);
984 ref = ir_emit(ctx, opt, op1, op2, op3);
1002 return ir_emit(ctx, opt, op1, op2, op3);
1006 ctx->fold_insn.op2 = op2;
1027 ir_ref ir_fold(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3) argument
1033 return ir_emit(ctx, opt, op1, op2, op3);
1035 …return ir_folding(ctx, opt, op1, op2, op3, ctx->ir_base + op1, ctx->ir_base + op2, ctx->ir_base + …
1048 ir_ref ir_fold2(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2) argument
1050 return ir_fold(ctx, opt, op1, op2, IR_UNUSED);
1053 ir_ref ir_fold3(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3) argument
1055 return ir_fold(ctx, opt, op1, op2, op3);
1763 if (insn1->op == IR_ADD && IR_IS_CONST_REF(insn1->op2)) {
1765 uintptr_t offset1 = ctx->ir_base[insn1->op2].val.u64;
1767 } else if (insn2->op == IR_ADD && IR_IS_CONST_REF(insn1->op2) && insn1->op1 == insn2->op1) {
1768 if (insn1->op2 == insn2->op2) {
1770 } else if (IR_IS_CONST_REF(insn1->op2) && IR_IS_CONST_REF(insn2->op2)) {
1771 uintptr_t offset1 = ctx->ir_base[insn1->op2].val.u64;
1772 uintptr_t offset2 = ctx->ir_base[insn2->op2].val.u64;
1777 } else if (insn2->op == IR_ADD && IR_IS_CONST_REF(insn2->op2)) {
1779 uintptr_t offset2 = ctx->ir_base[insn2->op2].val.u64;
1801 } else if (ctx->ir_base[insn1->op2].op == IR_SYM
1802 || ctx->ir_base[insn1->op2].op == IR_ALLOCA
1803 || ctx->ir_base[insn1->op2].op == IR_VADDR) {
1804 base1 = insn1->op2;
1808 off1 = insn1->op2;
1813 } else if (ctx->ir_base[insn2->op2].op == IR_SYM
1814 || ctx->ir_base[insn2->op2].op == IR_ALLOCA
1815 || ctx->ir_base[insn2->op2].op == IR_VADDR) {
1816 base2 = insn2->op2;
1820 off2 = insn2->op2;
1850 insn1 = &ctx->ir_base[insn1->op2];
1860 insn2 = &ctx->ir_base[insn2->op2];
1891 if (insn->op2 == addr) {
1904 if (insn->op2 == addr) {
1906 && (modified_regset & (1 << ctx->ir_base[insn->op3].op2))) {
1919 } else if (ir_check_partial_aliasing(ctx, addr, insn->op2, type, type2) != IR_NO_ALIAS) {
2048 if (insn->op == IR_NE && IR_IS_CONST_REF(insn->op2)) {
2049 ir_insn *op2_insn = &ctx->ir_base[insn->op2];
2074 if (insn->op2 == condition) {
2079 if (insn->op2 == condition) {
2084 if (insn->op2 == condition) {
2221 ref = insn->op2;
2229 ctx->ir_base[list].op2 = IR_UNUSED;
2238 ref = insn->op2;
2239 insn->op2 = IR_UNUSED;
2256 if (!end->op2) {
2624 if (insn->op2 == condition) {
2628 if (insn->op2 == condition) {
2633 if (insn->op2 == condition) {
2670 if (insn->op2 == condition) {
2674 if (insn->op2 == condition) {
2679 if (insn->op2 == condition) {
2749 if (insn->op2 == var) {
2762 if (insn->op2 == var) {
2806 if (insn->op2 == var) {
2822 if (insn->op2 == var) {
2889 if (insn->op2 == addr) {
2912 if (insn->op2 == addr) {
2917 if (ir_check_partial_aliasing(ctx, addr, insn->op2, type, type2) != IR_NO_ALIAS) {
