Lines Matching refs:TMP_REG2
86 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
1073 FAIL_IF(emit_load_imm64(compiler, FAST_IS_REG(arg) ? TMP_REG2 : TMP_REG1, immw)); \
1074 inst = emit_x86_instruction(compiler, 1, FAST_IS_REG(arg) ? TMP_REG2 : TMP_REG1, 0, arg, argw); \
1718 EMIT_MOV(compiler, TMP_REG2, 0, SLJIT_IMM, max); in emit_clz_ctz()
1719 FAIL_IF(emit_groupf(compiler, CMOVE_r_rm, dst_r, TMP_REG2, 0)); in emit_clz_ctz()
2204 FAIL_IF(emit_load_imm64(compiler, TMP_REG2, src1w));
2205 FAIL_IF(emit_groupf(compiler, IMUL_r_rm, dst_r, TMP_REG2, 0));
2243 FAIL_IF(emit_load_imm64(compiler, TMP_REG2, src2w));
2244 FAIL_IF(emit_groupf(compiler, IMUL_r_rm, dst_r, TMP_REG2, 0));
2401 FAIL_IF(emit_load_imm64(compiler, FAST_IS_REG(src1) ? TMP_REG2 : TMP_REG1, src2w));
2402 … inst = emit_x86_instruction(compiler, 1, FAST_IS_REG(src1) ? TMP_REG2 : TMP_REG1, 0, src1, src1w);
2459 FAIL_IF(emit_load_imm64(compiler, TMP_REG2, src2w));
2460 inst = emit_x86_instruction(compiler, 1, TMP_REG2, 0, TMP_REG1, 0);
2562 EMIT_MOV(compiler, TMP_REG2, 0, SLJIT_PREF_SHIFT_REG, 0);
2575 EMIT_MOV(compiler, SLJIT_PREF_SHIFT_REG, 0, TMP_REG2, 0);
