Lines Matching refs:VN
93 #define VN(vn) (((sljit_ins)freg_map[vn] << 16) | ((sljit_ins)freg_ebit_map[vn] << 7)) macro
1203 ((sljit_ins)(opcode) | (sljit_ins)(mode) | VD(dst) | VM(src1) | VN(src2))
2715 return push_inst(compiler, VMOV | (1 << 20) | RD(dst) | VN(TMP_FREG1)); in sljit_emit_fop1_conv_sw_from_f64()
2728 FAIL_IF(push_inst(compiler, VMOV | RD(src) | VN(TMP_FREG1))); in sljit_emit_fop1_conv_f64_from_w()
2735 FAIL_IF(push_inst(compiler, VMOV | RD(TMP_REG1) | VN(TMP_FREG1))); in sljit_emit_fop1_conv_f64_from_w()
2872 …FAIL_IF(push_inst(compiler, VMOV | (1 << 20) | VN(src2) | RD(TMP_REG1) | ((op & SLJIT_32) ? (1 << … in sljit_emit_fop2()
2915 return push_inst(compiler, VMOV | VN(freg) | RD(TMP_REG1)); in sljit_emit_fset32()
2969 inst = VMOV | VN(freg) | RD(reg); in sljit_emit_fcopy()
3485 return push_inst(compiler, VMOV | (1 << 20) | RD(SLJIT_R0) | VN(src)); in emit_fmov_before_return()
3837 FAIL_IF(push_inst(compiler, VMOV | (1 << 20) | VN(freg) | RD(TMP_REG2))); in sljit_emit_fmem()
3846 FAIL_IF(push_inst(compiler, VMOV | (1 << 20) | VN(freg) | 0x80 | RD(TMP_REG2))); in sljit_emit_fmem()
3852 return push_inst(compiler, VMOV | VN(freg) | RD(TMP_REG2)); in sljit_emit_fmem()
3940 ins = VD(srcdst) | VN(freg) | VM(freg); in sljit_emit_simd_mov()
3942 ins = VD(freg) | VN(srcdst) | VM(srcdst); in sljit_emit_simd_mov()
4097 FAIL_IF(push_inst(compiler, VORR | VD(freg) | VN(src) | VM(src))); in sljit_emit_simd_replicate()
4102 return push_inst(compiler, VORR | VD(freg) | VN(src) | VM(src)); in sljit_emit_simd_replicate()
4159 return push_inst(compiler, VDUP | ins | VN(freg) | RD(src)); in sljit_emit_simd_replicate()
4196 FAIL_IF(push_inst(compiler, VORR | VD(freg) | VN(srcdst) | VM(srcdst))); in sljit_emit_simd_lane_mov()
4203 FAIL_IF(push_inst(compiler, VORR | ins | VD(TMP_FREG2) | VN(freg) | VM(freg))); in sljit_emit_simd_lane_mov()
4231 return push_inst(compiler, VORR | VD(srcdst) | VN(freg) | VM(freg)); in sljit_emit_simd_lane_mov()
4243 …FAIL_IF(push_inst(compiler, VMOV_s | (1 << 20) | ((sljit_ins)lane_index << 21) | VN(freg) | RD(TMP… in sljit_emit_simd_lane_mov()
4244 return push_inst(compiler, VMOV | VN(srcdst) | RD(TMP_REG1)); in sljit_emit_simd_lane_mov()
4247 FAIL_IF(push_inst(compiler, VMOV | (1 << 20) | VN(srcdst) | RD(TMP_REG1))); in sljit_emit_simd_lane_mov()
4248 return push_inst(compiler, VMOV_s | ((sljit_ins)lane_index << 21) | VN(freg) | RD(TMP_REG1)); in sljit_emit_simd_lane_mov()
4276 return push_inst(compiler, VMOV_s | ins | VN(freg) | RD(srcdst)); in sljit_emit_simd_lane_mov()
4311 FAIL_IF(push_inst(compiler, VORR | VD(freg) | VN(src) | VM(src))); in sljit_emit_simd_lane_replicate()
4316 return push_inst(compiler, VORR | VD(freg) | VN(src) | VM(src)); in sljit_emit_simd_lane_replicate()
4374 return push_inst(compiler, VORR | VD(freg) | VN(TMP_FREG2) | VM(TMP_FREG2)); in sljit_emit_simd_extend()
4456 …FAIL_IF(push_inst(compiler, VMOV_s | (1 << 20) | (1 << 23) | (0x2 << 21) | RD(dst_r) | VN(TMP_FREG… in sljit_emit_simd_sign()
4460 …FAIL_IF(push_inst(compiler, VMOV_s | (1 << 20) | (1 << 23) | (0x2 << 21) | RD(TMP_REG2) | VN(TMP_F… in sljit_emit_simd_sign()
4508 return push_inst(compiler, ins | VD(dst_freg) | VN(src1_freg) | VM(src2_freg)); in sljit_emit_simd_op2()
