Lines Matching refs:F7
78 #define F7(f) ((sljit_ins)(f) << 25) macro
80 #define ADD (F7(0x0) | F3(0x0) | OPC(0x33))
82 #define AND (F7(0x0) | F3(0x7) | OPC(0x33))
91 #define DIV (F7(0x1) | F3(0x4) | OPC(0x33))
92 #define DIVU (F7(0x1) | F3(0x5) | OPC(0x33))
94 #define FADD_S (F7(0x0) | F3(0x7) | OPC(0x53))
95 #define FDIV_S (F7(0xc) | F3(0x7) | OPC(0x53))
96 #define FEQ_S (F7(0x50) | F3(0x2) | OPC(0x53))
98 #define FLE_S (F7(0x50) | F3(0x0) | OPC(0x53))
99 #define FLT_S (F7(0x50) | F3(0x1) | OPC(0x53))
102 #define FCVT_S_D (F7(0x20) | OPC(0x53))
103 #define FCVT_S_W (F7(0x68) | OPC(0x53))
104 #define FCVT_W_S (F7(0x60) | F3(0x1) | OPC(0x53))
105 #define FMUL_S (F7(0x8) | F3(0x7) | OPC(0x53))
106 #define FSGNJ_S (F7(0x10) | F3(0x0) | OPC(0x53))
107 #define FSGNJN_S (F7(0x10) | F3(0x1) | OPC(0x53))
108 #define FSGNJX_S (F7(0x10) | F3(0x2) | OPC(0x53))
109 #define FSUB_S (F7(0x4) | F3(0x7) | OPC(0x53))
115 #define MUL (F7(0x1) | F3(0x0) | OPC(0x33))
116 #define MULH (F7(0x1) | F3(0x1) | OPC(0x33))
117 #define MULHU (F7(0x1) | F3(0x3) | OPC(0x33))
118 #define OR (F7(0x0) | F3(0x6) | OPC(0x33))
120 #define REM (F7(0x1) | F3(0x6) | OPC(0x33))
121 #define REMU (F7(0x1) | F3(0x7) | OPC(0x33))
123 #define SLL (F7(0x0) | F3(0x1) | OPC(0x33))
125 #define SLT (F7(0x0) | F3(0x2) | OPC(0x33))
127 #define SLTU (F7(0x0) | F3(0x3) | OPC(0x33))
129 #define SRL (F7(0x0) | F3(0x5) | OPC(0x33))
131 #define SRA (F7(0x20) | F3(0x5) | OPC(0x33))
133 #define SUB (F7(0x20) | F3(0x0) | OPC(0x33))
135 #define XOR (F7(0x0) | F3(0x4) | OPC(0x33))
