Lines Matching refs:dst_reg
688 |.macro SSE_MATH_REG, opcode, dst_reg, src_reg
691 | addsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
694 | subsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
697 | mulsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
700 | divsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
754 |.macro AVX_MATH_REG, opcode, dst_reg, op1_reg, src_reg
757 | vaddsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
760 | vsubsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
763 | vmulsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
766 | vdivsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
881 |.macro LONG_MATH_REG, opcode, dst_reg, src_reg
884 | add dst_reg, src_reg
887 | sub dst_reg, src_reg
890 | imul dst_reg, src_reg
893 | or dst_reg, src_reg
896 | and dst_reg, src_reg
899 | xor dst_reg, src_reg
918 || zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ? Z_REG(dst_addr) : ZREG_XMM0;
921 | vxorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
923 | xorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
928 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [Ra(tmp_reg)]
931 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [((uint32_t)(uintptr_t)zv)]
933 | DOUBLE_SET_ZVAL_DVAL dst_addr, dst_reg
935 || zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ? Z_REG(dst_addr) : ZREG_XMM0;
936 | DOUBLE_GET_LONG dst_reg, Z_LVAL_P(zv), ZREG_R0
937 | DOUBLE_SET_ZVAL_DVAL dst_addr, dst_reg
971 || zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ?
975 | vxorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
977 | xorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
982 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [Ra(tmp_reg)]
985 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [((uint32_t)(uintptr_t)zv)]
