Lines Matching refs:r4
45 |.define T3, [r4+0x50] // Used to store old value of IP
46 |.define T2, [r4+0x48] // Used to store old value of FP
47 |.define T1, [r4+0x40]
48 |.define A6, [r4+0x28] // preallocated slot for 6-th argument
49 |.define A5, [r4+0x20] // preallocated slot for 5-th argument
73 |.define T3, [r4+0x20] // Used to store old value of IP (CALL VM only)
74 |.define T2, [r4+0x18] // Used to store old value of FP (CALL VM only)
75 |.define T1, [r4]
87 |.define T3, [r4+0x18] // Used to store old value of IP (CALL VM only)
88 |.define T2, [r4+0x14] // Used to store old value of FP (CALL VM only)
89 |.define T1, [r4]
90 …|.define A4, [r4+0xC] // preallocated slots for arguments of "cdecl" functions (intersect wi…
91 |.define A3, [r4+0x8]
92 |.define A2, [r4+0x4]
93 |.define A1, [r4]
175 | add r4, HYBRID_SPAD
181 | sub r4, HYBRID_SPAD
1523 | sub r4, 4
1528 | add r4, 4
1560 | sub r4, 4
1565 | add r4, 4
1731 | add r4, SPAD // stack alignment
1736 | add r4, NR_SPAD // stack alignment
1757 | add r4, SPAD // stack alignment
1764 | add r4, NR_SPAD // stack alignment
1842 | add r4, SPAD
1847 | add r4, NR_SPAD
1884 | add r4, NR_SPAD // stack alignment
1954 | sub r4, 0x28
1956 | sub r4, 8
1958 | sub r4, 12
1981 | add r4, 0x28 // stack alignment
1987 | add r4, 8 // stack alignment
1989 | sub r4, 4
1994 | add r4, 28
2014 | sub r4, 0x28
2016 | sub r4, 8
2018 | sub r4, 12
2042 | add r4, 0x28
2049 | add r4, 8
2051 | sub r4, 4
2058 | add r4, 28
2078 | sub r4, 0x28
2080 | sub r4, 8
2082 | sub r4, 12
2094 | add r4, 0x28
2099 | add r4, 8
2101 | sub r4, 8
2105 | add r4, 28
2150 | sub r4, 8
2159 | add r4, 16
2179 | sub r4, 8
2188 | add r4, 16
2203 | sub r4, 8
2207 | add r4, 16
2423 | add r4, SPAD // stack alignment
2429 | add r4, NR_SPAD // stack alignment
2442 | sub r4, 16*8+16*8-8 /* CPU regs + SSE regs */
2443 | mov aword [r4+15*8], r15
2444 | mov aword [r4+11*8], r11
2445 | mov aword [r4+10*8], r10
2446 | mov aword [r4+9*8], r9
2447 | mov aword [r4+8*8], r8
2448 | mov aword [r4+7*8], rdi
2449 | mov aword [r4+6*8], rsi
2450 | mov aword [r4+2*8], rdx
2451 | mov aword [r4+1*8], rcx
2452 | mov aword [r4+0*8], rax
2453 | mov FCARG1a, aword [r4+16*8+16*8-8] // exit_num = POP
2454 | mov FCARG2a, r4
2455 | movsd qword [r4+16*8+15*8], xmm15
2456 | movsd qword [r4+16*8+14*8], xmm14
2457 | movsd qword [r4+16*8+13*8], xmm13
2458 | movsd qword [r4+16*8+12*8], xmm12
2459 | movsd qword [r4+16*8+11*8], xmm11
2460 | movsd qword [r4+16*8+10*8], xmm10
2461 | movsd qword [r4+16*8+9*8], xmm9
2462 | movsd qword [r4+16*8+8*8], xmm8
2463 | movsd qword [r4+16*8+7*8], xmm7
2464 | movsd qword [r4+16*8+6*8], xmm6
2465 | movsd qword [r4+16*8+5*8], xmm5
2466 | movsd qword [r4+16*8+4*8], xmm4
2467 | movsd qword [r4+16*8+3*8], xmm3
2468 | movsd qword [r4+16*8+2*8], xmm2
2469 | movsd qword [r4+16*8+1*8], xmm1
2470 | movsd qword [r4+16*8+0*8], xmm0
2472 | sub r4, 32 /* shadow space */
2475 | sub r4, 8*4+8*8-4 /* CPU regs + SSE regs */
2476 | mov aword [r4+7*4], edi
2477 | mov aword [r4+2*4], edx
2478 | mov aword [r4+1*4], ecx
2479 | mov aword [r4+0*4], eax
2480 | mov FCARG1a, aword [r4+8*4+8*8-4] // exit_num = POP
2481 | mov FCARG2a, r4
2482 | movsd qword [r4+8*4+7*8], xmm7
2483 | movsd qword [r4+8*4+6*8], xmm6
2484 | movsd qword [r4+8*4+5*8], xmm5
2485 | movsd qword [r4+8*4+4*8], xmm4
2486 | movsd qword [r4+8*4+3*8], xmm3
2487 | movsd qword [r4+8*4+2*8], xmm2
2488 | movsd qword [r4+8*4+1*8], xmm1
2489 | movsd qword [r4+8*4+0*8], xmm0
2497 | add r4, 16*8+16*8+32 /* CPU regs + SSE regs + shadow space */
2499 | add r4, 16*8+16*8 /* CPU regs + SSE regs */
2501 | add r4, 8*4+8*8 /* CPU regs + SSE regs */
2516 | add r4, SPAD // stack alignment
2521 | add r4, NR_SPAD // stack alignment
2545 | add r4, SPAD // stack alignment
2561 | add r4, NR_SPAD // stack alignment
2577 | add r4, SPAD // stack alignment
2582 | add r4, NR_SPAD // stack alignment
2604 | add aword [r4], n
2619 | add r4, SPAD // stack alignment
2629 | add r4, NR_SPAD // stack alignment
2644 | sub r4, 0x28
2646 | sub r4, 8
2648 | sub r4, 12
2658 | add r4, 0x28
2660 | add r4, 8
2662 | add r4, 12
2676 | sub r4, 0x28
2678 | sub r4, 8
2680 | sub r4, 12
2690 | add r4, 0x28
2692 | add r4, 8
2694 | add r4, 12
2708 | sub r4, 0x28
2710 | sub r4, 8
2712 | sub r4, 12
2722 | add r4, 0x28
2724 | add r4, 8
2726 | add r4, 12
2740 | sub r4, 0x28
2742 | sub r4, 8
2744 | sub r4, 12
2754 | add r4, 0x28
2756 | add r4, 8
2758 | add r4, 12
2772 | sub r4, 0x28
2774 | sub r4, 8
2776 | sub r4, 12
2786 | add r4, 0x28
2788 | add r4, 8
2790 | add r4, 12
3014 || sp_adj[SP_ADJ_ASSIGN] = sp_adj[SP_ADJ_RET] + 0x28; // sub r4, 0x28
3016 || sp_adj[SP_ADJ_ASSIGN] = sp_adj[SP_ADJ_RET] + 8; // sub r4, 8
3018 || sp_adj[SP_ADJ_ASSIGN] = sp_adj[SP_ADJ_RET] + 12; // sub r4, 12
3023 || sp_adj[SP_ADJ_JIT] = sp_adj[SP_ADJ_VM] + HYBRID_SPAD; // sub r4, HYBRID_SPAD
3028 || sp_adj[SP_ADJ_JIT] = sp_adj[SP_ADJ_RET] + SPAD; // sub r4, SPAD
3030 || sp_adj[SP_ADJ_JIT] = sp_adj[SP_ADJ_RET] + NR_SPAD; // sub r4, NR_SPAD
3060 | sub r4, SPAD // stack alignment
3062 | sub r4, NR_SPAD // stack alignment
3440 // sub r4, HYBRID_SPAD
3443 // sub r4, HYBRID_SPAD
3447 // sub r4, SPAD // stack alignment
3454 // sub r4, NR_SPAD // stack alignment
3493 | add r4, SPAD // stack alignment
3512 | add r4, NR_SPAD // stack alignment
3795 | add r4, SPAD // stack alignment
3800 | add r4, NR_SPAD // stack alignment
5032 | sub r4, 12
5048 | add r4, 12
5439 | sub r4, 12
5459 | add r4, 12
5548 | sub r4, 12
5557 | add r4, 12
5586 | sub r4, 12
5592 | add r4, 12
6055 | sub r4, 12
6060 | add r4, 12
6087 | sub r4, 12
6092 | add r4, 12
6743 | sub r4, 8
6765 | add r4, 8
6939 | sub r4, 12
6949 | add r4, 12
7018 | sub r4, 8
7024 | add r4, 8
7080 | sub r4, 12
7091 | add r4, 12
9726 | sub r4, 12
9736 | add r4, 12
9810 | sub r4, 12
9819 | add r4, 12
10382 | add r4, SPAD // stack alignment
10387 | add r4, NR_SPAD // stack alignment
11691 | add r4, SPAD // stack alignment
11707 | add r4, NR_SPAD // stack alignment
11713 | add r4, NR_SPAD // stack alignment
12082 | sub r4, 12
12087 | add r4, 12
12119 | sub r4, 12
12128 | add r4, 12
12462 | sub r4, 12
12480 | add r4, 12
13177 | sub r4, 12
13182 | add r4, 12
13277 | sub r4, 12
13282 | add r4, 12
13696 | sub r4, 12
13716 | add r4, 12
13921 | sub r4, 8
13950 | add r4, 8
14157 | sub r4, 12
14167 | add r4, 12
14189 | sub r4, 8
14197 | add r4, 8
14244 | sub r4, 12
14254 | add r4, 12
14356 | sub r4, 4
14367 | add r4, 4
14553 | sub r4, 8
14565 | add r4, 8
14623 | sub r4, 8
14635 | add r4, 8
14684 | sub r4, 4
14699 | add r4, 4
15385 | sub r4, 8
15391 | add r4, 8
