Lines Matching refs:dst_reg
701 |.macro SSE_MATH_REG, opcode, dst_reg, src_reg
704 | addsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
707 | subsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
710 | mulsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
713 | divsd xmm(dst_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
758 |.macro AVX_MATH_REG, opcode, dst_reg, op1_reg, src_reg
761 | vaddsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
764 | vsubsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
767 | vmulsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
770 | vdivsd xmm(dst_reg-ZREG_XMM0), xmm(op1_reg-ZREG_XMM0), xmm(src_reg-ZREG_XMM0)
885 |.macro LONG_MATH_REG, opcode, dst_reg, src_reg
888 | add dst_reg, src_reg
891 | sub dst_reg, src_reg
894 | imul dst_reg, src_reg
897 | or dst_reg, src_reg
900 | and dst_reg, src_reg
903 | xor dst_reg, src_reg
922 || zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ? Z_REG(dst_addr) : ZREG_XMM0;
925 | vxorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
927 | xorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
932 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [Ra(tmp_reg)]
935 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [((uint32_t)(uintptr_t)zv)]
937 | SSE_SET_ZVAL_DVAL dst_addr, dst_reg
939 || zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ? Z_REG(dst_addr) : ZREG_XMM0;
940 | SSE_GET_LONG dst_reg, Z_LVAL_P(zv), ZREG_R0
941 | SSE_SET_ZVAL_DVAL dst_addr, dst_reg
975 || zend_reg dst_reg = (Z_MODE(dst_addr) == IS_REG) ?
979 | vxorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
981 | xorps xmm(dst_reg-ZREG_XMM0), xmm(dst_reg-ZREG_XMM0)
986 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [Ra(tmp_reg)]
989 | SSE_AVX_INS movsd, vmovsd, xmm(dst_reg-ZREG_XMM0), qword [((uint32_t)(uintptr_t)zv)]
