Lines Matching refs:HI
136 #define HI(opcode) ((opcode) << 26) macro
139 #define ADD (HI(31) | LO(266))
140 #define ADDC (HI(31) | LO(10))
141 #define ADDE (HI(31) | LO(138))
142 #define ADDI (HI(14))
143 #define ADDIC (HI(13))
144 #define ADDIS (HI(15))
145 #define ADDME (HI(31) | LO(234))
146 #define AND (HI(31) | LO(28))
147 #define ANDI (HI(28))
148 #define ANDIS (HI(29))
149 #define Bx (HI(18))
150 #define BCx (HI(16))
151 #define BCCTR (HI(19) | LO(528) | (3 << 11))
152 #define BLR (HI(19) | LO(16) | (0x14 << 21))
153 #define CNTLZD (HI(31) | LO(58))
154 #define CNTLZW (HI(31) | LO(26))
155 #define CMP (HI(31) | LO(0))
156 #define CMPI (HI(11))
157 #define CMPL (HI(31) | LO(32))
158 #define CMPLI (HI(10))
159 #define CROR (HI(19) | LO(449))
160 #define DCBT (HI(31) | LO(278))
161 #define DIVD (HI(31) | LO(489))
162 #define DIVDU (HI(31) | LO(457))
163 #define DIVW (HI(31) | LO(491))
164 #define DIVWU (HI(31) | LO(459))
165 #define EXTSB (HI(31) | LO(954))
166 #define EXTSH (HI(31) | LO(922))
167 #define EXTSW (HI(31) | LO(986))
168 #define FABS (HI(63) | LO(264))
169 #define FADD (HI(63) | LO(21))
170 #define FADDS (HI(59) | LO(21))
171 #define FCFID (HI(63) | LO(846))
172 #define FCMPU (HI(63) | LO(0))
173 #define FCTIDZ (HI(63) | LO(815))
174 #define FCTIWZ (HI(63) | LO(15))
175 #define FDIV (HI(63) | LO(18))
176 #define FDIVS (HI(59) | LO(18))
177 #define FMR (HI(63) | LO(72))
178 #define FMUL (HI(63) | LO(25))
179 #define FMULS (HI(59) | LO(25))
180 #define FNEG (HI(63) | LO(40))
181 #define FRSP (HI(63) | LO(12))
182 #define FSUB (HI(63) | LO(20))
183 #define FSUBS (HI(59) | LO(20))
184 #define LD (HI(58) | 0)
185 #define LWZ (HI(32))
186 #define MFCR (HI(31) | LO(19))
187 #define MFLR (HI(31) | LO(339) | 0x80000)
188 #define MFXER (HI(31) | LO(339) | 0x10000)
189 #define MTCTR (HI(31) | LO(467) | 0x90000)
190 #define MTLR (HI(31) | LO(467) | 0x80000)
191 #define MTXER (HI(31) | LO(467) | 0x10000)
192 #define MULHD (HI(31) | LO(73))
193 #define MULHDU (HI(31) | LO(9))
194 #define MULHW (HI(31) | LO(75))
195 #define MULHWU (HI(31) | LO(11))
196 #define MULLD (HI(31) | LO(233))
197 #define MULLI (HI(7))
198 #define MULLW (HI(31) | LO(235))
199 #define NEG (HI(31) | LO(104))
200 #define NOP (HI(24))
201 #define NOR (HI(31) | LO(124))
202 #define OR (HI(31) | LO(444))
203 #define ORI (HI(24))
204 #define ORIS (HI(25))
205 #define RLDICL (HI(30))
206 #define RLWINM (HI(21))
207 #define SLD (HI(31) | LO(27))
208 #define SLW (HI(31) | LO(24))
209 #define SRAD (HI(31) | LO(794))
210 #define SRADI (HI(31) | LO(413 << 1))
211 #define SRAW (HI(31) | LO(792))
212 #define SRAWI (HI(31) | LO(824))
213 #define SRD (HI(31) | LO(539))
214 #define SRW (HI(31) | LO(536))
215 #define STD (HI(62) | 0)
216 #define STDU (HI(62) | 1)
217 #define STDUX (HI(31) | LO(181))
218 #define STFIWX (HI(31) | LO(983))
219 #define STW (HI(36))
220 #define STWU (HI(37))
221 #define STWUX (HI(31) | LO(183))
222 #define SUBF (HI(31) | LO(40))
223 #define SUBFC (HI(31) | LO(8))
224 #define SUBFE (HI(31) | LO(136))
225 #define SUBFIC (HI(8))
226 #define XOR (HI(31) | LO(316))
227 #define XORI (HI(26))
228 #define XORIS (HI(27))
768 /* w u i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
769 /* w u i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
770 /* w u x s */ ARCH_32_64(HI(31) | LO(151) /* stwx */, HI(31) | LO(149) /* stdx */),
771 /* w u x l */ ARCH_32_64(HI(31) | LO(23) /* lwzx */, HI(31) | LO(21) /* ldx */),
773 /* w s i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
774 /* w s i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
775 /* w s x s */ ARCH_32_64(HI(31) | LO(151) /* stwx */, HI(31) | LO(149) /* stdx */),
776 /* w s x l */ ARCH_32_64(HI(31) | LO(23) /* lwzx */, HI(31) | LO(21) /* ldx */),
780 /* b u i s */ HI(38) /* stb */,
781 /* b u i l */ HI(34) /* lbz */,
782 /* b u x s */ HI(31) | LO(215) /* stbx */,
783 /* b u x l */ HI(31) | LO(87) /* lbzx */,
785 /* b s i s */ HI(38) /* stb */,
786 /* b s i l */ HI(34) /* lbz */ /* EXTS_REQ */,
787 /* b s x s */ HI(31) | LO(215) /* stbx */,
788 /* b s x l */ HI(31) | LO(87) /* lbzx */ /* EXTS_REQ */,
792 /* h u i s */ HI(44) /* sth */,
793 /* h u i l */ HI(40) /* lhz */,
794 /* h u x s */ HI(31) | LO(407) /* sthx */,
795 /* h u x l */ HI(31) | LO(279) /* lhzx */,
797 /* h s i s */ HI(44) /* sth */,
798 /* h s i l */ HI(42) /* lha */,
799 /* h s x s */ HI(31) | LO(407) /* sthx */,
800 /* h s x l */ HI(31) | LO(343) /* lhax */,
804 /* i u i s */ HI(36) /* stw */,
805 /* i u i l */ HI(32) /* lwz */,
806 /* i u x s */ HI(31) | LO(151) /* stwx */,
807 /* i u x l */ HI(31) | LO(23) /* lwzx */,
809 /* i s i s */ HI(36) /* stw */,
810 /* i s i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x2 /* lwa */),
811 /* i s x s */ HI(31) | LO(151) /* stwx */,
812 /* i s x l */ ARCH_32_64(HI(31) | LO(23) /* lwzx */, HI(31) | LO(341) /* lwax */),
816 /* d i s */ HI(54) /* stfd */,
817 /* d i l */ HI(50) /* lfd */,
818 /* d x s */ HI(31) | LO(727) /* stfdx */,
819 /* d x l */ HI(31) | LO(599) /* lfdx */,
821 /* s i s */ HI(52) /* stfs */,
822 /* s i l */ HI(48) /* lfs */,
823 /* s x s */ HI(31) | LO(663) /* stfsx */,
824 /* s x l */ HI(31) | LO(535) /* lfsx */,
833 /* w u i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
834 /* w u i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
835 /* w u x s */ ARCH_32_64(HI(31) | LO(183) /* stwux */, HI(31) | LO(181) /* stdux */),
836 /* w u x l */ ARCH_32_64(HI(31) | LO(55) /* lwzux */, HI(31) | LO(53) /* ldux */),
838 /* w s i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
839 /* w s i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
840 /* w s x s */ ARCH_32_64(HI(31) | LO(183) /* stwux */, HI(31) | LO(181) /* stdux */),
841 /* w s x l */ ARCH_32_64(HI(31) | LO(55) /* lwzux */, HI(31) | LO(53) /* ldux */),
845 /* b u i s */ HI(39) /* stbu */,
846 /* b u i l */ HI(35) /* lbzu */,
847 /* b u x s */ HI(31) | LO(247) /* stbux */,
848 /* b u x l */ HI(31) | LO(119) /* lbzux */,
850 /* b s i s */ HI(39) /* stbu */,
852 /* b s x s */ HI(31) | LO(247) /* stbux */,
857 /* h u i s */ HI(45) /* sthu */,
858 /* h u i l */ HI(41) /* lhzu */,
859 /* h u x s */ HI(31) | LO(439) /* sthux */,
860 /* h u x l */ HI(31) | LO(311) /* lhzux */,
862 /* h s i s */ HI(45) /* sthu */,
863 /* h s i l */ HI(43) /* lhau */,
864 /* h s x s */ HI(31) | LO(439) /* sthux */,
865 /* h s x l */ HI(31) | LO(375) /* lhaux */,
869 /* i u i s */ HI(37) /* stwu */,
870 /* i u i l */ HI(33) /* lwzu */,
871 /* i u x s */ HI(31) | LO(183) /* stwux */,
872 /* i u x l */ HI(31) | LO(55) /* lwzux */,
874 /* i s i s */ HI(37) /* stwu */,
875 /* i s i l */ ARCH_32_64(HI(33) /* lwzu */, 0 /* no such instruction */),
876 /* i s x s */ HI(31) | LO(183) /* stwux */,
877 /* i s x l */ ARCH_32_64(HI(31) | LO(55) /* lwzux */, HI(31) | LO(373) /* lwaux */),
881 /* d i s */ HI(55) /* stfdu */,
882 /* d i l */ HI(51) /* lfdu */,
883 /* d x s */ HI(31) | LO(759) /* stfdux */,
884 /* d x l */ HI(31) | LO(631) /* lfdux */,
886 /* s i s */ HI(53) /* stfsu */,
887 /* s i l */ HI(49) /* lfsu */,
888 /* s x s */ HI(31) | LO(695) /* stfsux */,
889 /* s x l */ HI(31) | LO(567) /* lfsux */,
