Lines Matching refs:INT_ALIGNED
749 #define INT_ALIGNED 0x10000 macro
760 (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
769 /* u w n i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
770 /* u w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
774 /* u w w i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
775 /* u w w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
819 /* s w n i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
820 /* s w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
824 /* s w w i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
825 /* s w w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
856 /* s i n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x2 /* lwa */),
861 /* s i w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | UPDATE_REQ | 0x2 /* lwa */),
897 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg_fast()
909 …if (argw > SIMM_MAX || argw < SIMM_MIN || ((inst & INT_ALIGNED) && (argw & 0x3)) || (inst & UPDATE… in getput_arg_fast()
922 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg_fast()
972 if ((inst & INT_ALIGNED) && (imm & 0x3)) { \
1017 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1029 && (!(inst & INT_ALIGNED) || !(argw & 0x3)) && !(inst & UPDATE_REQ)) { in getput_arg()
1038 SLJIT_ASSERT(high_short && !(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1094 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1110 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
1139 SLJIT_ASSERT(!(inst & (INT_ALIGNED | UPDATE_REQ))); in getput_arg()
