Lines Matching refs:DR
112 #define DR(dr) (reg_map[dr]) macro
522 ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS)); in getput_arg_fast()
581 FAIL_IF(push_inst(compiler, SLL_W | D(arg2) | S1(OFFS_REG(arg)) | IMM_ARG | argw, DR(arg2))); in getput_arg()
588 …inst(compiler, ADD | D(TMP_REG3) | S1(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3))); in getput_arg()
607 delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS; in getput_arg()
613 return push_inst(compiler, ADD | D(base) | S1(base) | S2(arg2), DR(base)); in getput_arg()
775 …ler, (op == SLJIT_LUMUL ? UMUL : SMUL) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R0))); in sljit_emit_op0()
776 return push_inst(compiler, RDY | D(SLJIT_R1), DR(SLJIT_R1)); in sljit_emit_op0()
789 FAIL_IF(push_inst(compiler, SRA | D(TMP_REG1) | S1(SLJIT_R0) | IMM(31), DR(TMP_REG1))); in sljit_emit_op0()
793 FAIL_IF(push_inst(compiler, OR | D(TMP_REG2) | S1(0) | S2(SLJIT_R0), DR(TMP_REG2))); in sljit_emit_op0()
794 …p | 0x2) == SLJIT_UDIVI ? UDIV : SDIV) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R0))); in sljit_emit_op0()
797 FAIL_IF(push_inst(compiler, SMUL | D(SLJIT_R1) | S1(SLJIT_R0) | S2(SLJIT_R1), DR(SLJIT_R1))); in sljit_emit_op0()
798 return push_inst(compiler, SUB | D(SLJIT_R1) | S1(TMP_REG2) | S2(SLJIT_R1), DR(SLJIT_R1)); in sljit_emit_op0()
1190 return push_inst(compiler, OR | D(dst) | S1(0) | S2(TMP_LINK), DR(dst)); in sljit_emit_fast_enter()
1203 FAIL_IF(push_inst(compiler, OR | D(TMP_LINK) | S1(0) | S2(src), DR(TMP_LINK))); in sljit_emit_fast_return()
