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Searched refs:IMM (Results 1 – 8 of 8) sorted by relevance

/PHP-8.0/ext/pcre/pcre2lib/sljit/
H A DsljitNativeSPARC_32.c30 return push_inst(compiler, OR | D(dst) | S1(0) | IMM(imm), DR(dst)); in load_immediate()
36 #define ARG2(flags, src2) ((flags & SRC2_IMM) ? IMM(src2) : S2(src2))
58 return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst)); in emit_single_op()
59 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst))); in emit_single_op()
60 return push_inst(compiler, SRA | D(dst) | S1(dst) | IMM(24), DR(dst)); in emit_single_op()
70 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(16), DR(dst))); in emit_single_op()
86 FAIL_IF(push_inst(compiler, OR | D(dst) | S1(0) | IMM(32), UNMOVABLE_INS)); in emit_single_op()
87 FAIL_IF(push_inst(compiler, OR | D(dst) | S1(0) | IMM(-1), DR(dst))); in emit_single_op()
91 FAIL_IF(push_inst(compiler, SLL | D(TMP_REG1) | S1(TMP_REG1) | IMM(1), DR(TMP_REG1))); in emit_single_op()
93 return push_inst(compiler, ADD | D(dst) | S1(dst) | IMM(1), UNMOVABLE_INS); in emit_single_op()
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H A DsljitNativeMIPS_32.c32 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
35 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
37 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
46 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
96 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
115 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); in emit_single_op()
146 FAIL_IF(push_inst(compiler, ORI | SA(0) | T(dst) | IMM(32), UNMOVABLE_INS)); in emit_single_op()
147 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(dst) | IMM(-1), DR(dst))); in emit_single_op()
149 FAIL_IF(push_inst(compiler, ADDIU | S(dst) | T(dst) | IMM(1), DR(dst))); in emit_single_op()
150 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS)); in emit_single_op()
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H A DsljitNativeMIPS_64.c38 return push_inst(compiler, ORI | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
41 return push_inst(compiler, ADDIU | SA(0) | TA(dst_ar) | IMM(imm), dst_ar); in load_immediate()
44 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(imm >> 16), dst_ar)); in load_immediate()
79 FAIL_IF(push_inst(compiler, LUI | TA(dst_ar) | IMM(uimm >> 48), dst_ar)); in load_immediate()
129 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
182 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xff), DR(dst)); in emit_single_op()
197 return push_inst(compiler, ANDI | S(src2) | T(dst) | IMM(0xffff), DR(dst)); in emit_single_op()
236 FAIL_IF(push_inst(compiler, BEQ | S(TMP_REG1) | TA(0) | IMM(5), UNMOVABLE_INS)); in emit_single_op()
241 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS)); in emit_single_op()
517 FAIL_IF(push_inst(compiler, LUI | T(dst) | IMM(init_value >> 48), DR(dst))); in emit_const()
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H A DsljitNativePPC_64.c49 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
52 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
55 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
67 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
73 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
84 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
90 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
100 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48))); in load_immediate()
109 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 48))); in load_immediate()
110 FAIL_IF(push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm >> 32))); in load_immediate()
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H A DsljitNativePPC_32.c32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
202 FAIL_IF(push_inst(compiler, ORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
203 return push_inst(compiler, ORIS | S(dst) | A(dst) | IMM(compiler->imm >> 16)); in emit_single_op()
218 FAIL_IF(push_inst(compiler, XORI | S(src1) | A(dst) | IMM(compiler->imm))); in emit_single_op()
219 return push_inst(compiler, XORIS | S(dst) | A(dst) | IMM(compiler->imm >> 16)); in emit_single_op()
254 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(init_value >> 16))); in emit_const()
255 return push_inst(compiler, ORI | S(reg) | A(reg) | IMM(init_value)); in emit_const()
H A DsljitNativeMIPS_common.c114 #define IMM(imm) ((imm) & 0xffff) macro
479 inst[0] = LUI | T(reg) | IMM(addr >> 16); in put_label_set()
483 inst[0] = LUI | T(reg) | IMM(addr >> 32); in put_label_set()
484 inst[1] = ORI | S(reg) | T(reg) | IMM((addr >> 16) & 0xffff); in put_label_set()
489 inst[0] = LUI | T(reg) | IMM(addr >> 48); in put_label_set()
490 inst[1] = ORI | S(reg) | T(reg) | IMM((addr >> 32) & 0xffff); in put_label_set()
492 inst[3] = ORI | S(reg) | T(reg) | IMM((addr >> 16) & 0xffff); in put_label_set()
497 inst[1] = ORI | S(reg) | T(reg) | IMM(addr & 0xffff); in put_label_set()
852 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i))); in sljit_emit_return()
858 FAIL_IF(push_inst(compiler, STACK_LOAD | base | T(i) | IMM(offs), DR(i))); in sljit_emit_return()
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H A DsljitNativePPC_common.c128 #define IMM(imm) ((imm) & 0xffff) macro
356 inst[0] = ORIS | S(TMP_ZERO) | A(reg) | IMM(addr >> 16); in put_label_set()
361 inst[0] = ORI | S(TMP_ZERO) | A(reg) | IMM(addr >> 32); in put_label_set()
364 inst[0] = ORIS | S(TMP_ZERO) | A(reg) | IMM(addr >> 48); in put_label_set()
365 inst[1] = ORI | S(reg) | A(reg) | IMM((addr >> 32) & 0xffff); in put_label_set()
370 inst[2] = ORIS | S(reg) | A(reg) | IMM((addr >> 16) & 0xffff); in put_label_set()
374 inst[1] = ORI | S(reg) | A(reg) | IMM(addr & 0xffff); in put_label_set()
715 FAIL_IF(push_inst(compiler, STACK_STORE | S(i) | A(SLJIT_SP) | IMM(offs))); in sljit_emit_enter()
720 FAIL_IF(push_inst(compiler, STACK_STORE | S(i) | A(SLJIT_SP) | IMM(offs))); in sljit_emit_enter()
804 FAIL_IF(push_inst(compiler, STACK_LOAD | D(i) | A(SLJIT_SP) | IMM(offs))); in sljit_emit_return()
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H A DsljitNativeSPARC_common.c125 #define IMM(imm) (((imm) & 0x1fff) | IMM_ARG) macro
517 FAIL_IF(push_inst(compiler, SAVE | D(SLJIT_SP) | S1(SLJIT_SP) | IMM(-local_size), UNMOVABLE_INS)); in sljit_emit_enter()
551 FAIL_IF(push_inst(compiler, JMPL | D(0) | S1A(31) | IMM(8), UNMOVABLE_INS)); in sljit_emit_return()
604 | S1(arg & REG_MASK) | ((arg & OFFS_REG_MASK) ? S2(OFFS_REG(arg)) : IMM(argw)), in getput_arg_fast()
669 …FAIL_IF(push_inst(compiler, ADD | D(TMP_REG3) | S1(TMP_REG3) | IMM(argw - compiler->cache_argw), D… in getput_arg()
690 …return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay… in getput_arg()
865 FAIL_IF(push_inst(compiler, SRA | D(TMP_REG1) | S1(SLJIT_R0) | IMM(31), DR(TMP_REG1))); in sljit_emit_op0()
991 FAIL_IF(push_inst(compiler, JMPL | D(0) | S1(TMP_LINK) | IMM(8), UNMOVABLE_INS)); in sljit_emit_op_src()
1425 …FAIL_IF(push_inst(compiler, JMPL | D(type >= SLJIT_FAST_CALL ? TMP_LINK : 0) | S1(src_r) | IMM(0),… in sljit_emit_ijump()
1480 FAIL_IF(push_inst(compiler, OR | D(reg) | S1(0) | IMM(1), UNMOVABLE_INS)); in sljit_emit_op_flags()
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