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Searched refs:reg_map (Results 1 – 13 of 13) sorted by relevance

/PHP-7.4/ext/pcre/pcre2lib/sljit/
H A DsljitNativeTILEGX_64.c1425 FAIL_IF(ADD(reg_map[base], reg_map[base], reg_map[!argw ? OFFS_REG(arg) : TMP_REG3])); in getput_arg()
1576 return ADD(reg_map[dst], reg_map[src2], ZERO); in emit_single_op()
1589 return ADD(reg_map[dst], reg_map[src2], ZERO); in emit_single_op()
1604 return ADD(reg_map[dst], reg_map[src2], ZERO); in emit_single_op()
1629 FAIL_IF(NOR(reg_map[dst], reg_map[src2], reg_map[src2])); in emit_single_op()
1638 FAIL_IF(CLZ(reg_map[dst], reg_map[src2])); in emit_single_op()
1696 FAIL_IF(ADD(reg_map[dst],reg_map[src1], reg_map[src2])); in emit_single_op()
1731 FAIL_IF(ADD(reg_map[dst], reg_map[src1], reg_map[src2])); in emit_single_op()
1814 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2])); in emit_single_op()
1845 FAIL_IF(SUB(reg_map[dst], reg_map[src1], reg_map[src2])); in emit_single_op()
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H A DsljitNativeX86_32.c115 PUSH_REG(reg_map[TMP_REG1]); in sljit_emit_enter()
132 inst[1] = MOD_REG | (reg_map[SLJIT_S0] << 3) | reg_map[SLJIT_R2]; in sljit_emit_enter()
137 inst[1] = MOD_REG | (reg_map[SLJIT_S1] << 3) | reg_map[SLJIT_R1]; in sljit_emit_enter()
149 inst[1] = MOD_DISP8 | (reg_map[SLJIT_S0] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
155 inst[1] = MOD_DISP8 | (reg_map[SLJIT_S1] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
161 inst[1] = MOD_DISP8 | (reg_map[SLJIT_S2] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
478 *buf_ptr++ = reg_map[b & REG_MASK] | (reg_map[OFFS_REG(b)] << 3); in emit_x86_instruction()
492 *buf_ptr++ = reg_map[b & REG_MASK] | (reg_map[OFFS_REG(b)] << 3) | (immb << 6); in emit_x86_instruction()
616 *inst++ = MOD_REG | (reg_map[SLJIT_R2] << 3) | reg_map[SLJIT_R0]; in c_fast_call_with_args()
857 POP_REG(reg_map[dst]); in sljit_emit_fast_enter()
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H A DsljitNativeX86_64.c156 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
160 if (reg_map[i] >= 8) in sljit_emit_enter()
170 if (reg_map[i] >= 8) in sljit_emit_enter()
351 if (reg_map[i] >= 8) in sljit_emit_return()
362 if (reg_map[i] >= 8) in sljit_emit_return()
472 if (reg_map[b] >= 8) in emit_x86_instruction()
503 if (reg_map[a] >= 8) in emit_x86_instruction()
617 SLJIT_ASSERT(reg_map[SLJIT_R1] == 6 && reg_map[SLJIT_R3] == 1 && reg_map[TMP_REG1] == 2); in call_with_args()
658 …SLJIT_ASSERT(reg_map[SLJIT_R3] == 1 && reg_map[SLJIT_R1] == 2 && reg_map[SLJIT_R2] == 8 && reg_map… in call_with_args()
778 if (reg_map[dst] < 8) { in sljit_emit_fast_enter()
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H A DsljitNativeX86_common.c972 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
973 && reg_map[SLJIT_R1] == 2 in sljit_emit_op0()
977 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
978 && reg_map[SLJIT_R1] < 7 in sljit_emit_op0()
1028 *inst = MOD_REG | ((op >= SLJIT_DIVMOD_UW) ? reg_map[TMP_REG1] : reg_map[SLJIT_R1]); in sljit_emit_op0()
1128 if (reg_map[src] >= 4) { in emit_mov_byte()
1141 if (reg_map[dst] < 4) { in emit_mov_byte()
2393 return reg_map[reg];
2847 if (reg_map[dst] <= 4) {
2859 *inst = MOD_REG | (reg_map[dst] << 3) | reg_map[dst];
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H A DsljitNativeARM_T2_32.c60 #define RD3(rd) (reg_map[rd])
69 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
71 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
73 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
78 #define RM4(rm) (reg_map[rm])
1073 push |= 1 << reg_map[i]; in sljit_emit_enter()
1207 pop |= 1 << reg_map[i]; in sljit_emit_return()
1210 pop |= 1 << reg_map[i]; in sljit_emit_return()
1265 | reg_map[SLJIT_R1]); in sljit_emit_op0()
1282 SLJIT_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 3); in sljit_emit_op0()
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H A DsljitNativeARM_32.c71 #define RM(rm) (reg_map[rm])
959 push |= 1 << reg_map[i]; in sljit_emit_enter()
962 push |= 1 << reg_map[i]; in sljit_emit_enter()
1019 pop |= 1 << reg_map[i]; in sljit_emit_return()
1022 pop |= 1 << reg_map[i]; in sljit_emit_return()
1151 return push_inst(compiler, MUL | (reg_map[dst] << 16) | (reg_map[src2] << 8) | reg_map[src1]); in emit_single_op()
1153 …AIL_IF(push_inst(compiler, SMULL | (reg_map[TMP_REG1] << 16) | (reg_map[dst] << 12) | (reg_map[src… in emit_single_op()
1634 | (reg_map[SLJIT_R0] << 8) in sljit_emit_op0()
1635 | reg_map[SLJIT_R1]); in sljit_emit_op0()
1641 SLJIT_ASSERT(reg_map[2] == 1 && reg_map[3] == 2 && reg_map[4] == 3); in sljit_emit_op0()
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H A DsljitNativeARM_64.c46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
55 #define RD(rd) (reg_map[rd])
56 #define RT(rt) (reg_map[rt])
57 #define RN(rn) (reg_map[rn] << 5)
58 #define RT2(rt2) (reg_map[rt2] << 10)
59 #define RM(rm) (reg_map[rm] << 16)
1338 SLJIT_ASSERT(reg_map[1] == 0 && reg_map[3] == 2 && reg_map[5] == 4); in sljit_emit_op_src()
1360 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeSPARC_common.c100 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
112 #define D(d) (reg_map[d] << 25)
116 #define S1(s1) (reg_map[s1] << 14)
119 #define S2(s2) (reg_map[s2])
127 #define DR(dr) (reg_map[dr])
1007 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativePPC_common.c107 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
118 #define D(d) (reg_map[d] << 21)
119 #define S(s) (reg_map[s] << 21)
120 #define A(a) (reg_map[a] << 16)
121 #define B(b) (reg_map[b] << 11)
122 #define C(c) (reg_map[c] << 6)
1570 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeMIPS_common.c82 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
104 #define S(s) (reg_map[s] << 21)
105 #define T(t) (reg_map[t] << 16)
106 #define D(d) (reg_map[d] << 11)
117 #define DR(dr) (reg_map[dr])
1500 return reg_map[reg]; in sljit_get_register_index()
H A DsljitNativeSPARC_32.c153 reg = reg_map[*src & REG_MASK]; in call_with_args()
H A DsljitNativeMIPS_32.c459 SLJIT_ASSERT(reg_map[TMP_REG1] == 4 && freg_map[TMP_FREG1] == 12); in call_with_args()
H A DsljitNativeMIPS_64.c558 SLJIT_ASSERT(reg_map[TMP_REG1] == 4 && freg_map[TMP_FREG1] == 12); in call_with_args()

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