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Searched refs:RS1 (Results 1 – 3 of 3) sorted by relevance

/php-src/ext/pcre/pcre2lib/sljit/
H A DsljitNativeRISCV_32.c32 return push_inst(compiler, ADDI | RD(dst_r) | RS1(TMP_ZERO) | IMM_I(imm)); in load_immediate()
42 return push_inst(compiler, ADDI | RD(dst_r) | RS1(dst_r) | IMM_I(imm)); in load_immediate()
66 FAIL_IF(push_inst(compiler, FLD | FRD(freg) | RS1(SLJIT_SP) | IMM_I(8))); in sljit_emit_fset64()
67 return push_inst(compiler, ADDI | RD(SLJIT_SP) | RS1(SLJIT_SP) | IMM_I(16)); in sljit_emit_fset64()
81 inst = FMV_W_X | RS1(reg) | FRD(freg); in sljit_emit_fcopy()
97 FAIL_IF(push_inst(compiler, SW | RS1(SLJIT_SP) | RS2(reg2) | (8 << 7))); in sljit_emit_fcopy()
101 FAIL_IF(push_inst(compiler, SW | RS1(SLJIT_SP) | RS2(reg) | (12 << 7))); in sljit_emit_fcopy()
102 FAIL_IF(push_inst(compiler, FLD | FRD(freg) | RS1(SLJIT_SP) | IMM_I(8))); in sljit_emit_fcopy()
104 FAIL_IF(push_inst(compiler, FSD | RS1(SLJIT_SP) | FRS2(freg) | (8 << 7))); in sljit_emit_fcopy()
109 FAIL_IF(push_inst(compiler, LW | RD(reg) | RS1(SLJIT_SP) | IMM_I(12))); in sljit_emit_fcopy()
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H A DsljitNativeRISCV_64.c32 return push_inst(compiler, ADDI | RD(dst_r) | RS1(TMP_ZERO) | IMM_I(imm)); in load_immediate()
38 return push_inst(compiler, XORI | RD(dst_r) | RS1(dst_r) | IMM_I(imm)); in load_immediate()
49 return push_inst(compiler, ADDI | RD(dst_r) | RS1(dst_r) | IMM_I(imm)); in load_immediate()
74 FAIL_IF(push_inst(compiler, SLLI | RD(dst_r) | RS1(dst_r) | IMM_I(12))); in load_immediate()
77 return push_inst(compiler, XORI | RD(dst_r) | RS1(dst_r) | IMM_I(imm)); in load_immediate()
121 FAIL_IF(push_inst(compiler, XORI | RD(dst_r) | RS1(dst_r) | IMM_I(imm))); in load_immediate()
123 FAIL_IF(push_inst(compiler, ADDI | RD(dst_r) | RS1(dst_r) | IMM_I(imm))); in load_immediate()
126 return push_inst(compiler, XOR | RD(dst_r) | RS1(dst_r) | RS2(tmp_r)); in load_immediate()
158 inst = FMV_W_X | RS1(reg) | FRD(freg); in sljit_emit_fcopy()
187 FAIL_IF(push_inst(compiler, XOR | RD(dst) | RS1(dst) | RS2(TMP_REG3))); in emit_const()
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H A DsljitNativeRISCV_common.c66 #define RS1(rs1) ((sljit_ins)reg_map[rs1] << 15) macro
337 ins[1] = ADDI | RD(reg) | RS1(reg) | IMM_I(addr); in load_addr_to_reg()
359 ins[1] = XORI | RD(reg) | RS1(reg) | IMM_I(high); in load_addr_to_reg()
365 ins[1] = ADDI | RD(reg) | RS1(reg) | IMM_I(high); in load_addr_to_reg()
368 ins[2] = SLLI | RD(reg) | RS1(reg) | IMM_I(12); in load_addr_to_reg()
398 ins[1] = ADDI | RD(reg) | RS1(reg) | IMM_I(addr); in load_addr_to_reg()
2567 return BNE | RS1(EQUAL_FLAG) | RS2(TMP_ZERO); in get_jump_instruction()
2569 return BEQ | RS1(EQUAL_FLAG) | RS2(TMP_ZERO); in get_jump_instruction()
2586 return BEQ | RS1(OTHER_FLAG) | RS2(TMP_ZERO); in get_jump_instruction()
2604 return BNE | RS1(OTHER_FLAG) | RS2(TMP_ZERO); in get_jump_instruction()
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