Lines Matching refs:OPC_2RI12
101 #define OPC_2RI12(opc) ((sljit_ins)(opc) << 22) macro
113 #define ADDI_W OPC_2RI12(0xa)
114 #define ADDI_D OPC_2RI12(0xb)
115 #define ANDI OPC_2RI12(0xd)
116 #define ORI OPC_2RI12(0xe)
117 #define XORI OPC_2RI12(0xf)
121 #define LU52I_D OPC_2RI12(0xc)
124 #define SLTI OPC_2RI12(0x8)
125 #define SLTUI OPC_2RI12(0x9)
211 #define LD_B OPC_2RI12(0xa0)
212 #define LD_H OPC_2RI12(0xa1)
213 #define LD_W OPC_2RI12(0xa2)
214 #define LD_D OPC_2RI12(0xa3)
216 #define ST_B OPC_2RI12(0xa4)
217 #define ST_H OPC_2RI12(0xa5)
218 #define ST_W OPC_2RI12(0xa6)
219 #define ST_D OPC_2RI12(0xa7)
221 #define LD_BU OPC_2RI12(0xa8)
222 #define LD_HU OPC_2RI12(0xa9)
223 #define LD_WU OPC_2RI12(0xaa)
239 #define PRELD OPC_2RI12(0xab)
313 #define FLD_S OPC_2RI12(0xac)
314 #define FLD_D OPC_2RI12(0xae)
315 #define FST_S OPC_2RI12(0xad)
316 #define FST_D OPC_2RI12(0xaf)
332 #define VLD OPC_2RI12(0xb0)
333 #define VST OPC_2RI12(0xb1)
334 #define XVLD OPC_2RI12(0xb2)
335 #define XVST OPC_2RI12(0xb3)
3701 SLJIT_ASSERT((inst[2] & OPC_2RI12(0x3ff)) == LU52I_D); in sljit_set_jump_addr()
3702 inst[2] = (inst[2] & (OPC_2RI12(0x3ff) | 0x3ff)) | IMM_I12(new_target >> 52); in sljit_set_jump_addr()
3704 SLJIT_ASSERT((inst[3] & OPC_2RI12(0x3ff)) == ORI || (inst[3] & OPC_2RI16(0x3f)) == JIRL); in sljit_set_jump_addr()
3705 if ((inst[3] & OPC_2RI12(0x3ff)) == ORI) in sljit_set_jump_addr()
3706 inst[3] = (inst[3] & (OPC_2RI12(0x3ff) | 0x3ff)) | IMM_I12(new_target); in sljit_set_jump_addr()
