Lines Matching refs:shift
4193 uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64);
4195 if (shift == 1) {
4198 | ASM_REG_IMM_OP shl, type, def_reg, shift
4201 uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64);
4203 | ASM_REG_IMM_OP shr, type, def_reg, shift
4235 uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64);
4238 IR_ASSERT(shift != 0);
4248 if (shift == 1) {
4283 | ASM_REG_IMM_OP sar, type, def_reg, shift
4299 uint32_t shift = IR_LOG2(ctx->ir_base[insn->op2].val.u64);
4302 IR_ASSERT(shift != 0);
4323 if (shift == 1) {
4327 | ASM_REG_IMM_OP shr, type, tmp_reg, (ir_type_size[type]*8-shift)
4371 uint32_t shift = IR_LOG2(ctx->ir_base[op_insn->op2].val.u64);
4372 | ASM_MEM_IMM_OP shl, type, mem, shift
4374 uint32_t shift = IR_LOG2(ctx->ir_base[op_insn->op2].val.u64);
4375 | ASM_MEM_IMM_OP shr, type, mem, shift
4497 int32_t shift;
4505 shift = ctx->ir_base[insn->op2].val.i32;
4523 | ASM_REG_IMM_OP shl, insn->type, def_reg, shift
4526 | ASM_REG_IMM_OP shr, insn->type, def_reg, shift
4529 | ASM_REG_IMM_OP sar, insn->type, def_reg, shift
4532 | ASM_REG_IMM_OP rol, insn->type, def_reg, shift
4535 | ASM_REG_IMM_OP ror, insn->type, def_reg, shift
4549 int32_t shift;
4555 shift = ctx->ir_base[op_insn->op2].val.i32;
4567 | ASM_MEM_IMM_OP shl, type, mem, shift
4570 | ASM_MEM_IMM_OP shr, type, mem, shift
4573 | ASM_MEM_IMM_OP sar, type, mem, shift
4576 | ASM_MEM_IMM_OP rol, type, mem, shift
4579 | ASM_MEM_IMM_OP ror, type, mem, shift