Lines Matching refs:insn
48 ir_insn *insn; in ir_assign_virtual_registers_slow() local
59 insn = ctx->ir_base + i; in ir_assign_virtual_registers_slow()
60 n = ir_insn_len(insn); in ir_assign_virtual_registers_slow()
62 insn += n; in ir_assign_virtual_registers_slow()
64 flags = ir_op_flags[insn->op]; in ir_assign_virtual_registers_slow()
65 …if (((flags & IR_OP_FLAG_DATA) && insn->op != IR_VAR && (insn->op != IR_PARAM || ctx->use_lists[i]… in ir_assign_virtual_registers_slow()
71 n = ir_insn_len(insn); in ir_assign_virtual_registers_slow()
73 insn += n; in ir_assign_virtual_registers_slow()
87 ir_insn *insn; in ir_assign_virtual_registers() local
96 for (i = 1, insn = &ctx->ir_base[1]; i < ctx->insns_count; i++, insn++) { in ir_assign_virtual_registers()
100 uint32_t flags = ir_op_flags[insn->op]; in ir_assign_virtual_registers()
503 ir_insn *insn; in ir_add_fusion_ranges() local
533 insn = &ctx->ir_base[input]; in ir_add_fusion_ranges()
534 flags = ir_op_flags[insn->op]; in ir_add_fusion_ranges()
537 p = insn->ops + j; in ir_add_fusion_ranges()
586 ir_insn *insn; in ir_compute_live_ranges() local
684 insn = &ctx->ir_base[use]; in ir_compute_live_ranges()
685 if (insn->op == IR_PHI) { in ir_compute_live_ranges()
686 ir_ref input = ir_insn_op(insn, k); in ir_compute_live_ranges()
706 insn = &ctx->ir_base[ref]; in ir_compute_live_ranges()
707 if (insn->op == IR_END || insn->op == IR_LOOP_END) { in ir_compute_live_ranges()
724 insn = &ctx->ir_base[ref]; in ir_compute_live_ranges()
725 if (insn->op != IR_VADDR) { in ir_compute_live_ranges()
726 insn->op3 = ctx->vars; in ir_compute_live_ranges()
752 insn = &ctx->ir_base[ref]; in ir_compute_live_ranges()
757 if (insn->op != IR_PHI) { in ir_compute_live_ranges()
764 if (insn->op == IR_PARAM || insn->op == IR_RLOAD) { in ir_compute_live_ranges()
769 if (!IR_IS_CONST_REF(insn->op1) && ctx->vregs[insn->op1]) { in ir_compute_live_ranges()
770 hint_ref = insn->op1; in ir_compute_live_ranges()
776 if (insn->op == IR_PARAM) { in ir_compute_live_ranges()
779 } else if (insn->op == IR_VLOAD) { in ir_compute_live_ranges()
790 ival->type = insn->type; in ir_compute_live_ranges()
801 ival->type = insn->type; in ir_compute_live_ranges()
807 IR_ASSERT(insn->op != IR_PHI && (!ctx->rules || !(ctx->rules[ref] & (IR_FUSED|IR_SKIPPED)))); in ir_compute_live_ranges()
808 flags = ir_op_flags[insn->op]; in ir_compute_live_ranges()
810 p = insn->ops + 1; in ir_compute_live_ranges()
815 for (; j <= insn->inputs_count; j++, p++) { in ir_compute_live_ranges()
834 } else if (input == insn->op1) { in ir_compute_live_ranges()
1000 ir_insn *insn = &ctx->ir_base[use]; in ir_compute_live_sets() local
1002 if (UNEXPECTED(insn->op == IR_PHI)) { in ir_compute_live_sets()
1003 ir_ref n = insn->inputs_count - 1; in ir_compute_live_sets()
1004 ir_ref *p = insn->ops + 2; /* PHI data inputs */ in ir_compute_live_sets()
1005 ir_ref *q = ctx->ir_base[insn->op1].ops + 1; /* MERGE inputs */ in ir_compute_live_sets()
1060 ir_insn *insn = &ctx->ir_base[bb->start]; in ir_compute_live_sets() local
1062 IR_ASSERT(insn->op == IR_ENTRY); in ir_compute_live_sets()
1063 IR_ASSERT(insn->op3 >= 0 && insn->op3 < (ir_ref)ctx->entries_count); in ir_compute_live_sets()
1067 ir_list_push_unchecked(live_lists, live_outs[ctx->cfg_blocks_count + 1 + insn->op3]); in ir_compute_live_sets()
1069 live_outs[ctx->cfg_blocks_count + 1 + insn->op3] = ir_list_len(live_lists) - 1; in ir_compute_live_sets()
1159 ir_insn *insn; in ir_add_fusion_ranges() local
1190 insn = &ctx->ir_base[input]; in ir_add_fusion_ranges()
1191 flags = ir_op_flags[insn->op]; in ir_add_fusion_ranges()
1195 p = insn->ops + j; in ir_add_fusion_ranges()
1243 ir_insn *insn; in ir_compute_live_ranges() local
1306 insn = &ctx->ir_base[use]; in ir_compute_live_ranges()
1307 if (insn->op == IR_PHI) { in ir_compute_live_ranges()
1308 ir_ref input = ir_insn_op(insn, k); in ir_compute_live_ranges()
1324 insn = &ctx->ir_base[ref]; in ir_compute_live_ranges()
1325 if (insn->op == IR_END || insn->op == IR_LOOP_END) { in ir_compute_live_ranges()
1342 insn = &ctx->ir_base[ref]; in ir_compute_live_ranges()
1343 if (insn->op != IR_VADDR) { in ir_compute_live_ranges()
1344 insn->op3 = ctx->vars; in ir_compute_live_ranges()
1370 insn = &ctx->ir_base[ref]; in ir_compute_live_ranges()
1373 if (insn->op != IR_PHI) { in ir_compute_live_ranges()
1380 if (insn->op == IR_PARAM || insn->op == IR_RLOAD) { in ir_compute_live_ranges()
1385 if (!IR_IS_CONST_REF(insn->op1) && ctx->vregs[insn->op1]) { in ir_compute_live_ranges()
1386 hint_ref = insn->op1; in ir_compute_live_ranges()
1396 if (insn->op == IR_PARAM) { in ir_compute_live_ranges()
1399 } else if (insn->op == IR_VLOAD) { in ir_compute_live_ranges()
1408 ival->type = insn->type; in ir_compute_live_ranges()
1417 ival->type = insn->type; in ir_compute_live_ranges()
1423 IR_ASSERT(insn->op != IR_PHI && (!ctx->rules || !(ctx->rules[ref] & (IR_FUSED|IR_SKIPPED)))); in ir_compute_live_ranges()
1424 flags = ir_op_flags[insn->op]; in ir_compute_live_ranges()
1426 p = insn->ops + 1; in ir_compute_live_ranges()
1431 for (; j <= insn->inputs_count; j++, p++) { in ir_compute_live_ranges()
1454 } else if (input == insn->op1) { in ir_compute_live_ranges()
1718 static void ir_swap_operands(ir_ctx *ctx, ir_ref i, ir_insn *insn) in ir_swap_operands() argument
1727 tmp = insn->op1; in ir_swap_operands()
1728 insn->op1 = insn->op2; in ir_swap_operands()
1729 insn->op2 = tmp; in ir_swap_operands()
1731 ival = ctx->live_intervals[ctx->vregs[insn->op1]]; in ir_swap_operands()
1747 p->hint_ref = insn->op1; in ir_swap_operands()
1753 if (insn->op2 > 0 && ctx->vregs[insn->op2]) { in ir_swap_operands()
1754 ival = ctx->live_intervals[ctx->vregs[insn->op2]]; in ir_swap_operands()
1814 static int ir_try_swap_operands(ir_ctx *ctx, ir_ref i, ir_insn *insn) in ir_try_swap_operands() argument
1816 if (ctx->vregs[insn->op1] in ir_try_swap_operands()
1817 && ctx->vregs[insn->op1] != ctx->vregs[i] in ir_try_swap_operands()
1818 && !ir_vregs_overlap(ctx, ctx->vregs[insn->op1], ctx->vregs[i]) in ir_try_swap_operands()
1819 && !ir_hint_conflict(ctx, i, ctx->vregs[insn->op1], ctx->vregs[i])) { in ir_try_swap_operands()
1822 if (ctx->vregs[insn->op2] && ctx->vregs[insn->op2] != ctx->vregs[i]) { in ir_try_swap_operands()
1825 ir_live_interval *ival = ctx->live_intervals[ctx->vregs[insn->op2]]; in ir_try_swap_operands()
1828 if ((ival->flags & IR_LIVE_INTERVAL_MEM_PARAM) && ctx->use_lists[insn->op2].count == 1) { in ir_try_swap_operands()
1837 if (!ir_vregs_overlap(ctx, ctx->vregs[insn->op2], ctx->vregs[i]) in ir_try_swap_operands()
1838 && !ir_hint_conflict(ctx, i, ctx->vregs[insn->op2], ctx->vregs[i])) { in ir_try_swap_operands()
1839 ir_swap_operands(ctx, i, insn); in ir_try_swap_operands()
1862 ir_insn *insn; in ir_coalesce() local
1880 insn = &ctx->ir_base[use]; in ir_coalesce()
1881 if (insn->op == IR_PHI) { in ir_coalesce()
1918 insn = &ctx->ir_base[use]; in ir_coalesce()
1919 if (insn->op == IR_PHI) { in ir_coalesce()
1920 input = ir_insn_op(insn, k); in ir_coalesce()
1990 insn = &ctx->ir_base[i]; in ir_coalesce()
1993 IR_ASSERT(ir_op_flags[insn->op] & IR_OP_FLAG_COMMUTATIVE); in ir_coalesce()
1996 && insn->op2 > 0 in ir_coalesce()
1997 && insn->op1 > 0 in ir_coalesce()
1998 && insn->op1 != insn->op2) { in ir_coalesce()
1999 ir_try_swap_operands(ctx, i, insn); in ir_coalesce()
2003 if (insn->op1 > 0 in ir_coalesce()
2004 && ctx->vregs[insn->op1] in ir_coalesce()
2005 && ctx->vregs[i] != ctx->vregs[insn->op1]) { in ir_coalesce()
2006 if (ir_vregs_inside(ctx, ctx->vregs[insn->op1], ctx->vregs[i])) { in ir_coalesce()
2009 ir_ref b2 = ir_binding_find(ctx, insn->op1); in ir_coalesce()
2014 ir_vregs_coalesce(ctx, ctx->vregs[i], ctx->vregs[insn->op1], i, insn->op1); in ir_coalesce()
2068 ir_insn *insn; in ir_compute_dessa_moves() local
2081 insn = &ctx->ir_base[use]; in ir_compute_dessa_moves()
2082 if (insn->op == IR_PHI) { in ir_compute_dessa_moves()
2084 … if (IR_IS_CONST_REF(ir_insn_op(insn, j)) || ctx->vregs[ir_insn_op(insn, j)] != ctx->vregs[use]) { in ir_compute_dessa_moves()
2115 ir_insn *insn; in ir_gen_dessa_moves() local
2141 insn = &ctx->ir_base[ref]; in ir_gen_dessa_moves()
2142 if (insn->op == IR_PHI) { in ir_gen_dessa_moves()
2143 input = ir_insn_op(insn, k); in ir_gen_dessa_moves()
2163 insn = &ctx->ir_base[ref]; in ir_gen_dessa_moves()
2164 IR_ASSERT(insn->op == IR_PHI); in ir_gen_dessa_moves()
2165 input = ir_insn_op(insn, k); in ir_gen_dessa_moves()
2210 insn = &ctx->ir_base[ref]; in ir_gen_dessa_moves()
2211 if (insn->op == IR_PHI) { in ir_gen_dessa_moves()
2212 input = ir_insn_op(insn, k); in ir_gen_dessa_moves()
2214 emit_copy(ctx, insn->type, input, ref); in ir_gen_dessa_moves()
3400 ir_insn *insn; in ir_ival_spill_for_fuse_load() local
3404 insn = &ctx->ir_base[IR_LIVE_POS_TO_REF(use_pos->pos)]; in ir_ival_spill_for_fuse_load()
3405 IR_ASSERT(insn->op == IR_PARAM); in ir_ival_spill_for_fuse_load()
3420 insn = &ctx->ir_base[IR_LIVE_POS_TO_REF(use_pos->pos)]; in ir_ival_spill_for_fuse_load()
3421 IR_ASSERT(insn->op == IR_VLOAD); in ir_ival_spill_for_fuse_load()
3422 IR_ASSERT(ctx->ir_base[insn->op2].op == IR_VAR); in ir_ival_spill_for_fuse_load()
3434 ir_use_list *use_list = &ctx->use_lists[insn->op2]; in ir_ival_spill_for_fuse_load()
3448 ival->stack_spill_pos = ctx->ir_base[insn->op2].op3; in ir_ival_spill_for_fuse_load()
3518 ir_insn *insn = &ctx->ir_base[var]; in ir_linear_scan() local
3520 IR_ASSERT(insn->op == IR_VAR || insn->op == IR_ALLOCA); in ir_linear_scan()
3521 vars = insn->op3; /* list next */ in ir_linear_scan()
3523 if (insn->op == IR_VAR) { in ir_linear_scan()
3524 ir_ref slot = ir_allocate_spill_slot(ctx, insn->type, &data);; in ir_linear_scan()
3528 insn->op3 = slot; in ir_linear_scan()
3533 insn = &ctx->ir_base[*p]; in ir_linear_scan()
3534 if (insn->op == IR_VADDR) { in ir_linear_scan()
3535 insn->op3 = slot; in ir_linear_scan()
3539 ir_insn *val = &ctx->ir_base[insn->op2]; in ir_linear_scan()
3541 IR_ASSERT(IR_IS_CONST_REF(insn->op2)); in ir_linear_scan()
3547 insn->op3 = ir_allocate_big_spill_slot(ctx, val->val.i32, &data); in ir_linear_scan()
4077 ir_insn *insn = &ctx->ir_base[ival->tmp_ref]; in assign_regs() local
4079 if (ival->tmp_op_num <= insn->inputs_count) { in assign_regs()
4080 ir_ref *ops = insn->ops; in assign_regs()
