Lines Matching refs:end
63 while (i < bb->end) { in ir_assign_virtual_registers_slow()
118 static ir_live_interval *ir_new_live_range(ir_ctx *ctx, int v, ir_live_pos start, ir_live_pos end) in ir_new_live_range() argument
128 ival->range.end = ival->end = end; in ir_new_live_range()
137 static ir_live_interval *ir_add_live_range(ir_ctx *ctx, int v, ir_live_pos start, ir_live_pos end) in ir_add_live_range() argument
143 return ir_new_live_range(ctx, v, start, end); in ir_add_live_range()
147 if (end >= p->start) { in ir_add_live_range()
151 if (p->end >= start) { in ir_add_live_range()
155 if (end > p->end) { in ir_add_live_range()
159 p->end = end; in ir_add_live_range()
160 while (next && p->end >= next->start) { in ir_add_live_range()
161 if (next->end > p->end) { in ir_add_live_range()
162 p->end = next->end; in ir_add_live_range()
171 ival->end = p->end; in ir_add_live_range()
178 } while (p && end >= p->start); in ir_add_live_range()
180 ival->end = end; in ir_add_live_range()
192 q->end = end; in ir_add_live_range()
206 q->end = p->end; in ir_add_live_range()
209 p->end = end; in ir_add_live_range()
214 …NE ir_live_interval *ir_add_prev_live_range(ir_ctx *ctx, int v, ir_live_pos start, ir_live_pos end) in ir_add_prev_live_range() argument
218 if (ival && ival->range.start == end) { in ir_add_prev_live_range()
222 return ir_add_live_range(ctx, v, start, end); in ir_add_prev_live_range()
225 static void ir_add_fixed_live_range(ir_ctx *ctx, ir_reg reg, ir_live_pos start, ir_live_pos end) in ir_add_fixed_live_range() argument
239 ival->range.end = ival->end = end; in ir_add_fixed_live_range()
245 } else if (EXPECTED(end < ival->range.start)) { in ir_add_fixed_live_range()
255 q->end = ival->range.end; in ir_add_fixed_live_range()
258 ival->range.end = end; in ir_add_fixed_live_range()
260 } else if (end == ival->range.start) { in ir_add_fixed_live_range()
263 ir_add_live_range(ctx, v, start, end); in ir_add_fixed_live_range()
277 ival->range.end = ival->end = IR_START_LIVE_POS_FROM_REF(ref) + tmp_reg.end; in ir_add_tmp()
525 IR_START_LIVE_POS_FROM_REF(ref) + constraints.tmp_regs[n].end); in ir_add_fusion_ranges()
669 IR_END_LIVE_POS_FROM_REF(bb->end)); in ir_compute_live_ranges()
696 IR_END_LIVE_POS_FROM_REF(bb->end)); in ir_compute_live_ranges()
697 ir_add_phi_use(ctx, ival, k, IR_DEF_LIVE_POS_FROM_REF(bb->end), use); in ir_compute_live_ranges()
705 ref = bb->end; in ir_compute_live_ranges()
743 IR_START_LIVE_POS_FROM_REF(ref) + constraints.tmp_regs[n].end); in ir_compute_live_ranges()
888 IR_END_LIVE_POS_FROM_REF(child_bb->end)); in ir_compute_live_ranges()
961 IR_END_LIVE_POS_FROM_REF(bb->end)); in ir_live_out_push()
1182 pos + constraints.tmp_regs[n].end); in ir_add_fusion_ranges()
1289 IR_END_LIVE_POS_FROM_REF(bb->end)); in ir_compute_live_ranges()
1314 ir_add_phi_use(ctx, ival, k, IR_DEF_LIVE_POS_FROM_REF(bb->end), use); in ir_compute_live_ranges()
1323 ref = bb->end; in ir_compute_live_ranges()
1361 IR_START_LIVE_POS_FROM_REF(ref) + constraints.tmp_regs[n].end); in ir_compute_live_ranges()
1515 if (lrg2->start < lrg1->end) { in ir_ivals_overlap()
1516 if (lrg1->start < lrg2->end) { in ir_ivals_overlap()
1539 if (ival2->range.start >= ival1->end in ir_vregs_overlap()
1540 || ival1->range.start >= ival2->end) { in ir_vregs_overlap()
1550 while (parent && parent->end < child->start) { in ir_ivals_inside()
1553 if (!parent || parent->start > child->start || parent->end < child->end) { in ir_ivals_inside()
1571 if (child_ival->end >= parent_ival->end) { in ir_vregs_inside()
1589 ir_add_live_range(ctx, r1, live_range->start, live_range->end); in ir_vregs_join()
1595 ir_add_live_range(ctx, r1, live_range->start, live_range->end); in ir_vregs_join()
1757 if (r->end == load_pos) { in ir_swap_operands()
1758 r->end = pos; in ir_swap_operands()
1760 ival->end = pos; in ir_swap_operands()
1832 if (r->end == pos) { in ir_try_swap_operands()
1833 r->end = load_pos; in ir_try_swap_operands()
1835 ival->end = load_pos; in ir_try_swap_operands()
1842 r->end = pos; in ir_try_swap_operands()
1844 ival->end = pos; in ir_try_swap_operands()
1943 if (r->end == IR_USE_LIVE_POS_FROM_REF(input)) { in ir_coalesce()
1949 r->end = IR_LOAD_LIVE_POS_FROM_REF(input); in ir_coalesce()
1951 ctx->live_intervals[v2]->end = IR_LOAD_LIVE_POS_FROM_REF(input); in ir_coalesce()
1954 r->end = IR_USE_LIVE_POS_FROM_REF(input); in ir_coalesce()
1956 ctx->live_intervals[v2]->end = IR_USE_LIVE_POS_FROM_REF(input); in ir_coalesce()
2230 ir_live_pos _end = _ival->end; \
2241 ir_live_pos _end = _ival->end; \
2253 ir_live_pos _end = _ival->end; \
2266 ir_live_pos _end = _ival->end; \
2288 if (position < live_range->end) { in ir_ival_covers()
2304 } else if (to <= r->end) { in ir_ival_has_hole_between()
2377 IR_ASSERT(max_pos < ival->end); in ir_find_optimal_split_position()
2399 if (IR_DEF_LIVE_POS_FROM_REF(bb->end) < min_pos) { in ir_find_optimal_split_position()
2405 if (IR_DEF_LIVE_POS_FROM_REF(max_bb->end) < max_pos) { in ir_find_optimal_split_position()
2406 return IR_DEF_LIVE_POS_FROM_REF(max_bb->end); in ir_find_optimal_split_position()
2430 while (p && pos >= p->end) { in ir_split_interval_at()
2476 child->range.end = p->end; in ir_split_interval_at()
2478 child->end = ival->end; in ir_split_interval_at()
2486 ival->end = prev->end; in ir_split_interval_at()
2491 p->end = ival->end = pos; in ir_split_interval_at()
2668 if (ival->end <= freeUntilPos[reg]) { in ir_try_allocate_preferred_reg()
2683 if (ival->end <= freeUntilPos[reg]) { in ir_try_allocate_preferred_reg()
2869 pos = ival->end; in ir_try_allocate_free_reg()
2912 if (*unhandled && ival->end > (*unhandled)->range.start) { in ir_try_allocate_free_reg()
2926 if (*unhandled && ival->end > (*unhandled)->range.start) { in ir_try_allocate_free_reg()
2942 while (other && other->range.start < ival->range.end) { in ir_try_allocate_free_reg()
2968 if (*unhandled && ival->end > (*unhandled)->range.start) { in ir_try_allocate_free_reg()
3011 if (*unhandled && ival->end > (*unhandled)->range.start) { in ir_try_allocate_free_reg()
3046 next_use_pos = ival->range.end; in ir_allocate_blocked_reg()
3213 if (ival->end > blockPos[reg]) { in ir_allocate_blocked_reg()
3274 if (ir_first_use_pos(other, IR_USE_MUST_BE_IN_REG) <= other->end) { in ir_allocate_blocked_reg()
3302 if (split_pos > child->range.start && split_pos < child->end) { in ir_allocate_blocked_reg()
3350 if (*unhandled && ival->end > (*unhandled)->range.start) { in ir_allocate_blocked_reg()
3367 tmp_reg.end = IR_SAVE_SUB_REF; in ir_fix_dessa_tmps()
3373 tmp_reg.end = IR_SAVE_SUB_REF; in ir_fix_dessa_tmps()
3380 tmp_reg.end = IR_SAVE_SUB_REF; in ir_fix_dessa_tmps()
3386 tmp_reg.end = IR_SAVE_SUB_REF; in ir_fix_dessa_tmps()
3391 if (!ir_has_tmp(ctx, bb->end, tmp_reg.num)) { in ir_fix_dessa_tmps()
3392 ir_add_tmp(ctx, bb->end, bb->end, tmp_reg.num, tmp_reg); in ir_fix_dessa_tmps()
3601 if (r->end <= position) { in ir_linear_scan()
3604 } while (r && r->end <= position); in ir_linear_scan()
3639 if (r->end <= position) { in ir_linear_scan()
3642 } while (r && r->end <= position); in ir_linear_scan()
3715 ival->end = r->end; in ir_linear_scan()
3738 if (other->end <= position) { in ir_linear_scan()
3765 if (unhandled && ival->end > unhandled->range.start) { in ir_linear_scan()
3829 if (!ir_ival_covers(ival, IR_SAVE_LIVE_POS_FROM_REF(bb->end))) { in needs_spill_reload()
3960 if (ir_ival_covers(ival, IR_SAVE_LIVE_POS_FROM_REF(ctx->cfg_blocks[use_b].end))) { in assign_regs()
4000 if (ir_ival_covers(ival, IR_SAVE_LIVE_POS_FROM_REF(ctx->cfg_blocks[use_b].end))) { in assign_regs()
