Lines Matching refs:insn
23 ir_insn *insn; in ir_gcm_schedule_early() local
27 insn = &ctx->ir_base[ref]; in ir_gcm_schedule_early()
29 IR_ASSERT(insn->op != IR_PARAM && insn->op != IR_VAR); in ir_gcm_schedule_early()
30 IR_ASSERT(insn->op != IR_PHI && insn->op != IR_PI); in ir_gcm_schedule_early()
35 n = insn->inputs_count; in ir_gcm_schedule_early()
36 for (p = insn->ops + 1; n > 0; p++, n--) { in ir_gcm_schedule_early()
93 ir_insn *insn = &ctx->ir_base[use]; in ir_gcm_select_best_block()
94 if (insn->op == IR_IF || insn->op == IR_GUARD || insn->op == IR_GUARD_NOT) { in ir_gcm_select_best_block()
203 ir_insn *insn; in ir_split_partially_dead_node() local
219 insn = &ctx->ir_base[use]; in ir_split_partially_dead_node()
220 if (insn->op == IR_PHI) { in ir_split_partially_dead_node()
221 ir_ref *p = insn->ops + 2; /* PHI data inputs */ in ir_split_partially_dead_node()
222 ir_ref *q = ctx->ir_base[insn->op1].ops + 1; /* MERGE inputs */ in ir_split_partially_dead_node()
223 ir_ref n = insn->inputs_count - 1; in ir_split_partially_dead_node()
325 insn = &ctx->ir_base[use]; in ir_split_partially_dead_node()
326 if (insn->op == IR_PHI) { in ir_split_partially_dead_node()
327 ir_ref *p = insn->ops + 2; /* PHI data inputs */ in ir_split_partially_dead_node()
328 ir_ref *q = ctx->ir_base[insn->op1].ops + 1; /* MERGE inputs */ in ir_split_partially_dead_node()
329 ir_ref n = insn->inputs_count - 1; in ir_split_partially_dead_node()
397 insn = &ctx->ir_base[ref]; in ir_split_partially_dead_node()
400 clones[i].ref = clone = ir_emit(ctx, insn->optx, insn->op1, insn->op2, insn->op3); in ir_split_partially_dead_node()
401 insn = &ctx->ir_base[ref]; in ir_split_partially_dead_node()
402 if (insn->op1 > 0) ir_use_list_add(ctx, insn->op1, clone); in ir_split_partially_dead_node()
403 if (insn->op2 > 0) ir_use_list_add(ctx, insn->op2, clone); in ir_split_partially_dead_node()
404 if (insn->op3 > 0) ir_use_list_add(ctx, insn->op3, clone); in ir_split_partially_dead_node()
431 ir_insn *insn = &ctx->ir_base[use]; in ir_split_partially_dead_node() local
432 ir_ref k, l = insn->inputs_count; in ir_split_partially_dead_node()
434 if (insn->op == IR_PHI) { in ir_split_partially_dead_node()
436 if (ir_insn_op(insn, k) == ref) { in ir_split_partially_dead_node()
437 j = ctx->cfg_map[ir_insn_op(&ctx->ir_base[insn->op1], k - 1)]; in ir_split_partially_dead_node()
447 ir_insn_set_op(insn, k, clone); in ir_split_partially_dead_node()
453 if (ir_insn_op(insn, k) == ref) { in ir_split_partially_dead_node()
454 ir_insn_set_op(insn, k, clone); in ir_split_partially_dead_node()
513 ir_insn *insn = &ctx->ir_base[use]; in ir_gcm_schedule_late() local
514 ir_ref *p = insn->ops + 2; /* PHI data inputs */ in ir_gcm_schedule_late()
515 ir_ref *q = ctx->ir_base[insn->op1].ops + 1; /* MERGE inputs */ in ir_gcm_schedule_late()
516 ir_ref n = insn->inputs_count - 1; in ir_gcm_schedule_late()
567 ir_insn *insn, *use_insn; in ir_gcm() local
578 insn = &ctx->ir_base[ref]; in ir_gcm()
580 if (insn->inputs_count > 1) { in ir_gcm()
584 ref = insn->op1; /* control predecessor */ in ir_gcm()
602 insn = &ctx->ir_base[ref]; in ir_gcm()
603 n = insn->inputs_count; in ir_gcm()
604 for (p = insn->ops + 1; n > 0; p++, n--) { in ir_gcm()
627 insn = &ctx->ir_base[ref]; in ir_gcm()
629 if (insn->inputs_count > 1) { in ir_gcm()
633 ref = insn->op1; /* control predecessor */ in ir_gcm()
636 insn = &ctx->ir_base[ref]; in ir_gcm()
638 if (insn->inputs_count > 1) { in ir_gcm()
642 if (insn->type != IR_VOID) { in ir_gcm()
643 IR_ASSERT(ir_op_flags[insn->op] & IR_OP_FLAG_MEM); in ir_gcm()
645 ref = insn->op1; /* control predecessor */ in ir_gcm()
678 insn = &ctx->ir_base[ref]; in ir_gcm()
679 k = insn->inputs_count - 1; in ir_gcm()
680 for (p = insn->ops + 2; k > 0; p++, k--) { in ir_gcm()
797 ir_insn *insn, *new_insn; in ir_schedule() local
859 insn = &ctx->ir_base[k]; in ir_schedule()
860 while (insn->op == IR_PHI || insn->op == IR_PARAM || insn->op == IR_VAR || insn->op == IR_PI) { in ir_schedule()
862 insn = &ctx->ir_base[k]; in ir_schedule()
897 insn = &ctx->ir_base[i]; in ir_schedule()
898 if (insn->op == IR_CASE_VAL) { in ir_schedule()
899 IR_ASSERT(insn->op2 < IR_TRUE); in ir_schedule()
900 consts_count += ir_count_constant(_xlat, insn->op2); in ir_schedule()
902 n = insn->inputs_count; in ir_schedule()
905 insn = &ctx->ir_base[i]; in ir_schedule()
908 while (insn->op == IR_PARAM || insn->op == IR_VAR || insn->op == IR_PI) { in ir_schedule()
912 insn = &ctx->ir_base[i]; in ir_schedule()
915 while (insn->op == IR_PHI) { in ir_schedule()
921 for (j = n, p = insn->ops + 2; j > 0; p++, j--) { in ir_schedule()
928 insn = &ctx->ir_base[i]; in ir_schedule()
941 insn = &ctx->ir_base[i]; in ir_schedule()
958 n = insn->inputs_count; in ir_schedule()
959 for (j = n, p = insn->ops + 1; j > 0; p++, j--) { in ir_schedule()
981 insn = &ctx->ir_base[i]; in ir_schedule()
992 insn = &ctx->ir_base[i]; in ir_schedule()
997 if (IR_INPUT_EDGES_COUNT(ir_op_flags[insn->op]) == 2) { in ir_schedule()
998 if (insn->op2 < IR_TRUE) { in ir_schedule()
999 consts_count += ir_count_constant(_xlat, insn->op2); in ir_schedule()
1064 insn = &ctx->ir_base[ref]; in ir_schedule()
1067 memcpy(new_insn, insn, sizeof(ir_insn) * (IR_TRUE - ref)); in ir_schedule()
1093 for (ref = IR_TRUE - 1, insn = &ctx->ir_base[ref]; ref > -ctx->consts_count; insn--, ref--) { in ir_schedule()
1097 new_insn->optx = insn->optx; in ir_schedule()
1099 if (insn->op == IR_FUNC_ADDR) { in ir_schedule()
1100 new_insn->val.u64 = insn->val.u64; in ir_schedule()
1101 if (insn->proto) { in ir_schedule()
1103 const char *proto = ir_get_strl(ctx, insn->proto, &len); in ir_schedule()
1108 } else if (insn->op == IR_FUNC) { in ir_schedule()
1109 new_insn->val.u64 = ir_str(&new_ctx, ir_get_str(ctx, insn->val.name)); in ir_schedule()
1110 if (insn->proto) { in ir_schedule()
1112 const char *proto = ir_get_strl(ctx, insn->proto, &len); in ir_schedule()
1117 } else if (insn->op == IR_SYM || insn->op == IR_STR) { in ir_schedule()
1118 new_insn->val.u64 = ir_str(&new_ctx, ir_get_str(ctx, insn->val.name)); in ir_schedule()
1120 new_insn->val.u64 = insn->val.u64; in ir_schedule()
1170 insn = &ctx->ir_base[i]; in ir_schedule()
1173 new_insn->optx = insn->optx; in ir_schedule()
1177 new_insn->op1 = insn->op1; in ir_schedule()
1178 new_insn->op2 = insn->op2; in ir_schedule()
1179 new_insn->op3 = insn->op3; in ir_schedule()
1182 new_insn->op1 = _xlat[insn->op1]; in ir_schedule()
1183 if (new_insn->op == IR_PARAM || insn->op == IR_VAR) { in ir_schedule()
1184 new_insn->op2 = ir_str(&new_ctx, ir_get_str(ctx, insn->op2)); in ir_schedule()
1187 const char *proto = ir_get_strl(ctx, insn->op2, &len); in ir_schedule()
1190 new_insn->op2 = insn->op2; in ir_schedule()
1192 new_insn->op3 = insn->op3; in ir_schedule()
1195 new_insn->op1 = _xlat[insn->op1]; in ir_schedule()
1196 new_insn->op2 = _xlat[insn->op2]; in ir_schedule()
1197 new_insn->op3 = insn->op3; in ir_schedule()
1231 new_insn->op1 = _xlat[insn->op1]; in ir_schedule()
1232 new_insn->op2 = _xlat[insn->op2]; in ir_schedule()
1233 new_insn->op3 = _xlat[insn->op3]; in ir_schedule()
1236 for (j = n, p = insn->ops + 1, q = new_insn->ops + 1; j > 0; p++, q++, j--) { in ir_schedule()
1244 insn = &new_ctx.ir_base[1]; in ir_schedule()
1245 ref = insn->op1; in ir_schedule()
1247 insn->op1 = ref = _xlat[ref]; in ir_schedule()
1249 insn = &new_ctx.ir_base[ref]; in ir_schedule()
1250 ref = insn->op3; in ir_schedule()
1254 insn->op3 = ref = _xlat[ref]; in ir_schedule()
1294 ir_insn *insn; in ir_build_prev_refs() local
1300 for (i = bb->start, insn = ctx->ir_base + i; i < bb->end;) { in ir_build_prev_refs()
1302 n = ir_insn_len(insn); in ir_build_prev_refs()
1305 insn += n; in ir_build_prev_refs()
