Lines Matching refs:bb
79 ir_block *bb = &ctx->cfg_blocks[lca]; in ir_gcm_select_best_block() local
80 uint32_t loop_depth = bb->loop_depth; in ir_gcm_select_best_block()
102 flags = (bb->flags & IR_BB_LOOP_HEADER) ? bb->flags : ctx->cfg_blocks[bb->loop_header].flags; in ir_gcm_select_best_block()
111 b = bb->dom_parent; in ir_gcm_select_best_block()
112 bb = &ctx->cfg_blocks[b]; in ir_gcm_select_best_block()
113 if (bb->loop_depth < loop_depth) { in ir_gcm_select_best_block()
114 if (!bb->loop_depth) { in ir_gcm_select_best_block()
137 flags = (bb->flags & IR_BB_LOOP_HEADER) ? bb->flags : ctx->cfg_blocks[bb->loop_header].flags; in ir_gcm_select_best_block()
142 loop_depth = bb->loop_depth; in ir_gcm_select_best_block()
162 static void _push_predecessors(ir_ctx *ctx, ir_block *bb, ir_gcm_split_data *data) in _push_predecessors() argument
164 uint32_t *p, i, n = bb->predecessors_count; in _push_predecessors()
167 p = ctx->cfg_edges + bb->predecessors; in _push_predecessors()
178 static bool _check_successors(ir_ctx *ctx, ir_block *bb, ir_gcm_split_data *data) in _check_successors() argument
180 uint32_t *p, i, n = bb->successors_count; in _check_successors()
183 IR_ASSERT(ir_sparse_set_in(&data->totally_useful, ctx->cfg_edges[bb->successors])); in _check_successors()
187 p = ctx->cfg_edges + bb->successors; in _check_successors()
274 ir_block *bb = &ctx->cfg_blocks[i]; in ir_split_partially_dead_node() local
276 if (_check_successors(ctx, bb, data)) { in ir_split_partially_dead_node()
283 _push_predecessors(ctx, bb, data); in ir_split_partially_dead_node()
563 ir_block *bb; in ir_gcm() local
622 for (bb = ctx->cfg_blocks + b; b > 0; bb--, b--) { in ir_gcm()
623 IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE)); in ir_gcm()
624 ref = bb->end; in ir_gcm()
635 while (ref != bb->start) { in ir_gcm()
658 bb->flags |= (use_insn->op == IR_PHI) ? IR_BB_HAS_PHI : IR_BB_HAS_PI; in ir_gcm()
664 bb->flags |= IR_BB_HAS_PARAM; in ir_gcm()
667 bb->flags |= IR_BB_HAS_VAR; in ir_gcm()
796 ir_block *bb; in ir_schedule() local
815 bb = &ctx->cfg_blocks[b]; in ir_schedule()
816 if (i == bb->start) { in ir_schedule()
817 IR_ASSERT(bb->end > bb->start); in ir_schedule()
819 prev_b_end = bb->end; in ir_schedule()
820 _prev[bb->end] = 0; in ir_schedule()
826 IR_ASSERT(i != bb->end); in ir_schedule()
832 bb = &ctx->cfg_blocks[b]; in ir_schedule()
833 IR_ASSERT(i != bb->start); in ir_schedule()
834 if (_prev[bb->end]) { in ir_schedule()
836 k = bb->end; in ir_schedule()
854 bb = &ctx->cfg_blocks[b]; in ir_schedule()
855 k = _next[bb->start]; in ir_schedule()
857 if (bb->flags & (IR_BB_HAS_PHI|IR_BB_HAS_PI|IR_BB_HAS_PARAM|IR_BB_HAS_VAR)) { in ir_schedule()
892 for (b = 1, bb = ctx->cfg_blocks + 1; b <= ctx->cfg_blocks_count; b++, bb++) { in ir_schedule()
893 IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE)); in ir_schedule()
895 i = bb->start; in ir_schedule()
896 _xlat[i] = bb->start = insns_count; in ir_schedule()
906 if (bb->flags & (IR_BB_HAS_PHI|IR_BB_HAS_PI|IR_BB_HAS_PARAM|IR_BB_HAS_VAR)) { in ir_schedule()
931 if (bb->successors_count > 1) { in ir_schedule()
932 ir_ref input, j = bb->end; in ir_schedule()
954 while (i != bb->end) { in ir_schedule()
995 _xlat[i] = bb->end = insns_count; in ir_schedule()
1292 ir_block *bb; in ir_build_prev_refs() local
1298 for (b = 1, bb = ctx->cfg_blocks + b; b <= ctx->cfg_blocks_count; b++, bb++) { in ir_build_prev_refs()
1299 IR_ASSERT(!(bb->flags & IR_BB_UNREACHABLE)); in ir_build_prev_refs()
1300 for (i = bb->start, insn = ctx->ir_base + i; i < bb->end;) { in ir_build_prev_refs()
