Lines Matching refs:insn
205 static uint64_t ir_disasm_branch_target(csh cs, const cs_insn *insn) in ir_disasm_branch_target() argument
210 if (cs_insn_group(cs, insn, X86_GRP_JUMP)) { in ir_disasm_branch_target()
211 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_branch_target()
212 if (insn->detail->x86.operands[i].type == X86_OP_IMM) { in ir_disasm_branch_target()
213 return insn->detail->x86.operands[i].imm; in ir_disasm_branch_target()
218 if (cs_insn_group(cs, insn, ARM64_GRP_JUMP) in ir_disasm_branch_target()
219 || insn->id == ARM64_INS_BL in ir_disasm_branch_target()
220 || insn->id == ARM64_INS_ADR) { in ir_disasm_branch_target()
221 for (i = 0; i < insn->detail->arm64.op_count; i++) { in ir_disasm_branch_target()
222 if (insn->detail->arm64.operands[i].type == ARM64_OP_IMM) in ir_disasm_branch_target()
223 return insn->detail->arm64.operands[i].imm; in ir_disasm_branch_target()
231 static uint64_t ir_disasm_rodata_reference(csh cs, const cs_insn *insn) in ir_disasm_rodata_reference() argument
236 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_rodata_reference()
237 if (insn->detail->x86.operands[i].type == X86_OP_MEM in ir_disasm_rodata_reference()
238 && insn->detail->x86.operands[i].mem.base == X86_REG_INVALID in ir_disasm_rodata_reference()
239 && insn->detail->x86.operands[i].mem.segment == X86_REG_INVALID in ir_disasm_rodata_reference()
240 && insn->detail->x86.operands[i].mem.index == X86_REG_INVALID in ir_disasm_rodata_reference()
241 && insn->detail->x86.operands[i].mem.scale == 1) { in ir_disasm_rodata_reference()
242 return (uint32_t)insn->detail->x86.operands[i].mem.disp; in ir_disasm_rodata_reference()
245 if (cs_insn_group(cs, insn, X86_GRP_JUMP)) { in ir_disasm_rodata_reference()
246 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_rodata_reference()
247 if (insn->detail->x86.operands[i].type == X86_OP_MEM in ir_disasm_rodata_reference()
248 && insn->detail->x86.operands[i].mem.disp) { in ir_disasm_rodata_reference()
249 return (uint32_t)insn->detail->x86.operands[i].mem.disp; in ir_disasm_rodata_reference()
253 if (insn->id == X86_INS_MOV in ir_disasm_rodata_reference()
254 && insn->detail->x86.op_count == 2 in ir_disasm_rodata_reference()
255 && insn->detail->x86.operands[0].type == X86_OP_IMM in ir_disasm_rodata_reference()
256 && insn->detail->x86.operands[0].size == sizeof(void*)) { in ir_disasm_rodata_reference()
257 return (uint32_t)insn->detail->x86.operands[0].imm; in ir_disasm_rodata_reference()
262 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_rodata_reference()
263 if (insn->detail->x86.operands[i].type == X86_OP_MEM in ir_disasm_rodata_reference()
264 && insn->detail->x86.operands[i].mem.base == X86_REG_RIP in ir_disasm_rodata_reference()
265 && insn->detail->x86.operands[i].mem.segment == X86_REG_INVALID in ir_disasm_rodata_reference()
267 && insn->detail->x86.operands[i].mem.index == X86_REG_INVALID in ir_disasm_rodata_reference()
268 && insn->detail->x86.operands[i].mem.scale == 1) { in ir_disasm_rodata_reference()
269 return insn->detail->x86.operands[i].mem.disp + insn->address + insn->size; in ir_disasm_rodata_reference()
275 if (insn->id == ARM64_INS_ADR in ir_disasm_rodata_reference()
276 || insn->id == ARM64_INS_LDRB in ir_disasm_rodata_reference()
277 || insn->id == ARM64_INS_LDR in ir_disasm_rodata_reference()
278 || insn->id == ARM64_INS_LDRH in ir_disasm_rodata_reference()
279 || insn->id == ARM64_INS_LDRSB in ir_disasm_rodata_reference()
280 || insn->id == ARM64_INS_LDRSH in ir_disasm_rodata_reference()
281 || insn->id == ARM64_INS_LDRSW in ir_disasm_rodata_reference()
282 || insn->id == ARM64_INS_STRB in ir_disasm_rodata_reference()
283 || insn->id == ARM64_INS_STR in ir_disasm_rodata_reference()
284 || insn->id == ARM64_INS_STRH) { in ir_disasm_rodata_reference()
285 for (i = 0; i < insn->detail->arm64.op_count; i++) { in ir_disasm_rodata_reference()
286 if (insn->detail->arm64.operands[i].type == ARM64_OP_IMM) in ir_disasm_rodata_reference()
287 return insn->detail->arm64.operands[i].imm; in ir_disasm_rodata_reference()
340 cs_insn *insn; local
397 ir_insn *insn = &ctx->ir_base[ctx->entries[--i]]; local
398 ir_hashtab_add(&labels, insn->op3, insn->op2);
441 insn = cs_malloc(cs);
442 while (cs_disasm_iter(cs, &cs_code, &cs_size, &cs_addr, insn)) {
443 if ((addr = ir_disasm_branch_target(cs, insn))
445 count = cs_disasm(cs, start, (uint8_t*)end - (uint8_t*)start, (uintptr_t)start, 0, &insn);
447 if ((addr = ir_disasm_branch_target(cs, &(insn[i])))
452 } else if ((addr = ir_disasm_rodata_reference(cs, insn))) {
454 } else if ((addr = ir_disasm_rodata_reference(cs, &(insn[i])))) {
480 while (cs_disasm_iter(cs, &cs_code, &cs_size, &cs_addr, insn)) {
481 entry = ir_hashtab_find(&labels, (uint32_t)((uintptr_t)insn->address - (uintptr_t)start));
484 entry = ir_hashtab_find(&labels, (uint32_t)((uintptr_t)insn->address - (uintptr_t)start));
496 fprintf(f, " %" PRIx64 ":", insn->address);
498 p = insn->op_str;
501 if (insn->id == X86_INS_MOVQ && strcmp(insn->mnemonic, "movd") == 0) {
502 insn->mnemonic[3] = 'q';
506 fprintf(f, "\t%s\n", insn->mnemonic);
509 fprintf(f, "\t%s ", insn->mnemonic);
513 fprintf(f, " %" PRIx64 ":", insn[i].address);
515 p = insn[i].op_str;
517 fprintf(f, "\t%s\n", insn[i].mnemonic);
520 fprintf(f, "\t%s ", insn[i].mnemonic);
526 if ((addr = ir_disasm_rodata_reference(cs, insn))) {
528 if ((addr = ir_disasm_rodata_reference(cs, &(insn[i])))) {
645 cs_free(insn, 1);
647 cs_free(insn, count);
