Lines Matching refs:detail
211 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_branch_target()
212 if (insn->detail->x86.operands[i].type == X86_OP_IMM) { in ir_disasm_branch_target()
213 return insn->detail->x86.operands[i].imm; in ir_disasm_branch_target()
221 for (i = 0; i < insn->detail->arm64.op_count; i++) { in ir_disasm_branch_target()
222 if (insn->detail->arm64.operands[i].type == ARM64_OP_IMM) in ir_disasm_branch_target()
223 return insn->detail->arm64.operands[i].imm; in ir_disasm_branch_target()
236 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_rodata_reference()
237 if (insn->detail->x86.operands[i].type == X86_OP_MEM in ir_disasm_rodata_reference()
238 && insn->detail->x86.operands[i].mem.base == X86_REG_INVALID in ir_disasm_rodata_reference()
239 && insn->detail->x86.operands[i].mem.segment == X86_REG_INVALID in ir_disasm_rodata_reference()
240 && insn->detail->x86.operands[i].mem.index == X86_REG_INVALID in ir_disasm_rodata_reference()
241 && insn->detail->x86.operands[i].mem.scale == 1) { in ir_disasm_rodata_reference()
242 return (uint32_t)insn->detail->x86.operands[i].mem.disp; in ir_disasm_rodata_reference()
246 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_rodata_reference()
247 if (insn->detail->x86.operands[i].type == X86_OP_MEM in ir_disasm_rodata_reference()
248 && insn->detail->x86.operands[i].mem.disp) { in ir_disasm_rodata_reference()
249 return (uint32_t)insn->detail->x86.operands[i].mem.disp; in ir_disasm_rodata_reference()
254 && insn->detail->x86.op_count == 2 in ir_disasm_rodata_reference()
255 && insn->detail->x86.operands[0].type == X86_OP_IMM in ir_disasm_rodata_reference()
256 && insn->detail->x86.operands[0].size == sizeof(void*)) { in ir_disasm_rodata_reference()
257 return (uint32_t)insn->detail->x86.operands[0].imm; in ir_disasm_rodata_reference()
262 for (i = 0; i < insn->detail->x86.op_count; i++) { in ir_disasm_rodata_reference()
263 if (insn->detail->x86.operands[i].type == X86_OP_MEM in ir_disasm_rodata_reference()
264 && insn->detail->x86.operands[i].mem.base == X86_REG_RIP in ir_disasm_rodata_reference()
265 && insn->detail->x86.operands[i].mem.segment == X86_REG_INVALID in ir_disasm_rodata_reference()
267 && insn->detail->x86.operands[i].mem.index == X86_REG_INVALID in ir_disasm_rodata_reference()
268 && insn->detail->x86.operands[i].mem.scale == 1) { in ir_disasm_rodata_reference()
269 return insn->detail->x86.operands[i].mem.disp + insn->address + insn->size; in ir_disasm_rodata_reference()
285 for (i = 0; i < insn->detail->arm64.op_count; i++) { in ir_disasm_rodata_reference()
286 if (insn->detail->arm64.operands[i].type == ARM64_OP_IMM) in ir_disasm_rodata_reference()
287 return insn->detail->arm64.operands[i].imm; in ir_disasm_rodata_reference()
