Lines Matching refs:n
341 int n = 0;
349 n = 0;
351 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
352 n++;
354 constraints->tmp_regs[n] = IR_TMP_REG(1, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
355 n++;
365 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
366 n++;
370 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_SAVE_SUB_REF);
371 n++;
377 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
378 n++;
384 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
385 n++;
389 constraints->tmp_regs[n] = IR_TMP_REG(2, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
390 n++;
393 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
394 n++;
396 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_SAVE_SUB_REF);
397 n++;
411 n = 0;
413 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
414 n++;
419 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
420 n++;
427 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_SAVE_SUB_REF);
428 n++;
430 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
431 n++;
437 n = 0;
439 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
440 n++;
445 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
446 n++;
453 n = 0;
455 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
456 n++;
458 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_USE_SUB_REF, IR_SAVE_SUB_REF);
459 n++;
465 n = 1;
470 n = 0;
472 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
473 n++;
476 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
477 n++;
482 n = 0;
484 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
485 n++;
488 n = 1;
493 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
494 n++;
497 constraints->tmp_regs[n] = IR_TMP_REG(2, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
498 n++;
503 n = 0;
506 constraints->tmp_regs[n] = IR_TMP_REG(1, val_insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
507 n++;
511 constraints->tmp_regs[n] = IR_TMP_REG(2, val_insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
512 n++;
520 n = 1;
523 n = 1;
528 n = 0;
531 constraints->tmp_regs[n] = IR_TMP_REG(2, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
532 n++;
538 n = 0;
541 constraints->tmp_regs[n] = IR_TMP_REG(2, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
542 n++;
547 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
548 n++;
551 constraints->tmp_regs[n] = IR_TMP_REG(3, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
552 n++;
557 n = 0;
560 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
561 n++;
564 constraints->tmp_regs[n] = IR_TMP_REG(1, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
565 n++;
567 constraints->tmp_regs[n] = IR_TMP_REG(3, IR_ADDR, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
568 n++;
574 n = 1;
582 constraints->tmp_regs[n] = IR_TMP_REG(1, IR_ADDR, IR_LOAD_SUB_REF, IR_USE_SUB_REF);
583 n++;
590 n = 0;
592 …constraints->tmp_regs[n] = IR_TMP_REG(1, ctx->ir_base[insn->op1].type, IR_LOAD_SUB_REF, IR_DEF_SUB…
593 n++;
596 constraints->tmp_regs[n] = IR_TMP_REG(2, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
597 n++;
600 constraints->tmp_regs[n] = IR_TMP_REG(3, insn->type, IR_LOAD_SUB_REF, IR_DEF_SUB_REF);
601 n++;
649 n = 1;
654 n = 1;
659 n = 1;
662 constraints->tmps_count = n;
1060 ir_ref *p, n = use_list->count;
1061 for (p = &ctx->use_edges[use_list->refs]; n > 0; p++, n--) {
1089 ir_ref *p, n = use_list->count;
1091 for (p = &ctx->use_edges[use_list->refs]; n > 0; p++, n--) {
3048 // case IR_ULT: fprintf(stderr, "\tjb .LL%d\n", true_block); break;
3049 // case IR_UGE: fprintf(stderr, "\tjae .LL%d\n", true_block); break;
3050 // case IR_ULE: fprintf(stderr, "\tjbe .LL%d\n", true_block); break;
3051 // case IR_UGT: fprintf(stderr, "\tja .LL%d\n", true_block); break;
4445 uint32_t n, *p, use_block;
4463 for (n = bb->successors_count; n != 0; p++, n--) {
4503 for (n = bb->successors_count; n != 0; p++, n--) {
4586 for (n = bb->successors_count; n != 0; p++, n--) {
4611 int j, n;
4623 n = insn->inputs_count;
4624 for (j = 3; j <= n; j++) {
4652 int j, n;
4670 n = insn->inputs_count;
4671 if (n < 3) {
4708 copies = ir_mem_malloc((n - 2) * sizeof(ir_copy));
4709 for (j = 3; j <= n; j++) {
4775 for (j = 3; j <= n; j++) {
5108 // case IR_ULT: fprintf(stderr, "\tjb .LL%d\n", true_block); break;
5109 // case IR_UGE: fprintf(stderr, "\tjae .LL%d\n", true_block); break;
5110 // case IR_ULE: fprintf(stderr, "\tjbe .LL%d\n", true_block); break;
5111 // case IR_UGT: fprintf(stderr, "\tja .LL%d\n", true_block); break;
5353 ir_ref i, n, *p, use;
5370 n = use_list->count;
5371 for (i = 0, p = &ctx->use_edges[use_list->refs]; i < n; i++, p++) {
5462 ir_ref i, n, *p, use;
5480 n = use_list->count;
5481 for (i = 0, p = &ctx->use_edges[use_list->refs]; i < n; i++, p++) {
5530 ir_ref i, n, j, *p;
5607 ir_ref n = use_list->count;
5609 if (n > 0) {
5614 for (i = 0, p = &ctx->use_edges[use_list->refs]; i < n; i++, p++) {
5646 n = constraints.tmps_count;
5647 if (n) {
5649 n--;
5650 if (constraints.tmp_regs[n].type) {
5651 ir_reg reg = ir_get_free_reg(constraints.tmp_regs[n].type, available);
5654 if (constraints.tmp_regs[n].num > 0
5655 && IR_IS_CONST_REF(ops[constraints.tmp_regs[n].num])) {
5659 ctx->regs[i][constraints.tmp_regs[n].num] = reg;
5660 } else if (constraints.tmp_regs[n].reg == IR_REG_SCRATCH) {
5663 IR_REGSET_EXCL(available, constraints.tmp_regs[n].reg);
5665 } while (n);
5667 n = insn->inputs_count;
5668 for (j = 1, p = insn->ops + 1; j <= n; j++, p++) {
5693 n = ir_insn_len(insn);
5694 i += n;
5695 insn += n;
5696 rule += n;
5712 ir_ref i, n;
5722 n = ir_insn_len(insn);
5723 i += n;
5724 insn += n;
5812 uint32_t _b, b, n, target;
5846 …f(stderr, "IR Compilation Aborted: ctx->stack_frame_size > ctx->fixed_stack_frame_size at %s:%d\n",
5905 n = ir_insn_len(insn);
5906 i += n;
5907 insn += n;
6138 n = ir_insn_len(insn);
6139 i += n;
6140 insn += n;
6141 rule += n;
6394 int n, m;
6410 n = (int)na;
6413 if ((ptrdiff_t)n != na) {
6416 if ((n & 3) == 0 && ((n+0x08000000) >> 28) == 0) {
6417 return n;
6420 if ((n & 3) == 0 && ((n+0x00100000) >> 21) == 0) {
6421 return n;
6428 if ((n & 3) == 0 && ((n+0x00008000) >> 16) == 0) {
6429 return n;
6441 n = (int)na;
6444 if ((ptrdiff_t)n != na) {
6448 if ((n & 3) != 0 || ((n+0x08000000) >> 28) != 0) {
6453 if ((n & 3) != 0 || ((n+0x00100000) >> 21) != 0) {
6464 if ((n & 3) != 0 || ((n+0x00008000) >> 16) != 0) {
6496 return n;
