Lines Matching refs:HI
129 #define HI(opcode) ((opcode) << 26) macro
132 #define ADD (HI(31) | LO(266))
133 #define ADDC (HI(31) | LO(10))
134 #define ADDE (HI(31) | LO(138))
135 #define ADDI (HI(14))
136 #define ADDIC (HI(13))
137 #define ADDIS (HI(15))
138 #define ADDME (HI(31) | LO(234))
139 #define AND (HI(31) | LO(28))
140 #define ANDI (HI(28))
141 #define ANDIS (HI(29))
142 #define Bx (HI(18))
143 #define BCx (HI(16))
144 #define BCCTR (HI(19) | LO(528) | (3 << 11))
145 #define BLR (HI(19) | LO(16) | (0x14 << 21))
146 #define CNTLZD (HI(31) | LO(58))
147 #define CNTLZW (HI(31) | LO(26))
148 #define CMP (HI(31) | LO(0))
149 #define CMPI (HI(11))
150 #define CMPL (HI(31) | LO(32))
151 #define CMPLI (HI(10))
152 #define CROR (HI(19) | LO(449))
153 #define DIVD (HI(31) | LO(489))
154 #define DIVDU (HI(31) | LO(457))
155 #define DIVW (HI(31) | LO(491))
156 #define DIVWU (HI(31) | LO(459))
157 #define EXTSB (HI(31) | LO(954))
158 #define EXTSH (HI(31) | LO(922))
159 #define EXTSW (HI(31) | LO(986))
160 #define FABS (HI(63) | LO(264))
161 #define FADD (HI(63) | LO(21))
162 #define FADDS (HI(59) | LO(21))
163 #define FCFID (HI(63) | LO(846))
164 #define FCMPU (HI(63) | LO(0))
165 #define FCTIDZ (HI(63) | LO(815))
166 #define FCTIWZ (HI(63) | LO(15))
167 #define FDIV (HI(63) | LO(18))
168 #define FDIVS (HI(59) | LO(18))
169 #define FMR (HI(63) | LO(72))
170 #define FMUL (HI(63) | LO(25))
171 #define FMULS (HI(59) | LO(25))
172 #define FNEG (HI(63) | LO(40))
173 #define FRSP (HI(63) | LO(12))
174 #define FSUB (HI(63) | LO(20))
175 #define FSUBS (HI(59) | LO(20))
176 #define LD (HI(58) | 0)
177 #define LWZ (HI(32))
178 #define MFCR (HI(31) | LO(19))
179 #define MFLR (HI(31) | LO(339) | 0x80000)
180 #define MFXER (HI(31) | LO(339) | 0x10000)
181 #define MTCTR (HI(31) | LO(467) | 0x90000)
182 #define MTLR (HI(31) | LO(467) | 0x80000)
183 #define MTXER (HI(31) | LO(467) | 0x10000)
184 #define MULHD (HI(31) | LO(73))
185 #define MULHDU (HI(31) | LO(9))
186 #define MULHW (HI(31) | LO(75))
187 #define MULHWU (HI(31) | LO(11))
188 #define MULLD (HI(31) | LO(233))
189 #define MULLI (HI(7))
190 #define MULLW (HI(31) | LO(235))
191 #define NEG (HI(31) | LO(104))
192 #define NOP (HI(24))
193 #define NOR (HI(31) | LO(124))
194 #define OR (HI(31) | LO(444))
195 #define ORI (HI(24))
196 #define ORIS (HI(25))
197 #define RLDICL (HI(30))
198 #define RLWINM (HI(21))
199 #define SLD (HI(31) | LO(27))
200 #define SLW (HI(31) | LO(24))
201 #define SRAD (HI(31) | LO(794))
202 #define SRADI (HI(31) | LO(413 << 1))
203 #define SRAW (HI(31) | LO(792))
204 #define SRAWI (HI(31) | LO(824))
205 #define SRD (HI(31) | LO(539))
206 #define SRW (HI(31) | LO(536))
207 #define STD (HI(62) | 0)
208 #define STDU (HI(62) | 1)
209 #define STDUX (HI(31) | LO(181))
210 #define STFIWX (HI(31) | LO(983))
211 #define STW (HI(36))
212 #define STWU (HI(37))
213 #define STWUX (HI(31) | LO(183))
214 #define SUBF (HI(31) | LO(40))
215 #define SUBFC (HI(31) | LO(8))
216 #define SUBFE (HI(31) | LO(136))
217 #define SUBFIC (HI(8))
218 #define XOR (HI(31) | LO(316))
219 #define XORI (HI(26))
220 #define XORIS (HI(27))
731 /* u w n i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
732 /* u w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
733 /* u w n x s */ ARCH_32_64(HI(31) | LO(151) /* stwx */, HI(31) | LO(149) /* stdx */),
734 /* u w n x l */ ARCH_32_64(HI(31) | LO(23) /* lwzx */, HI(31) | LO(21) /* ldx */),
736 /* u w w i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
737 /* u w w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
738 /* u w w x s */ ARCH_32_64(HI(31) | LO(183) /* stwux */, HI(31) | LO(181) /* stdux */),
739 /* u w w x l */ ARCH_32_64(HI(31) | LO(55) /* lwzux */, HI(31) | LO(53) /* ldux */),
743 /* u b n i s */ HI(38) /* stb */,
744 /* u b n i l */ HI(34) /* lbz */,
745 /* u b n x s */ HI(31) | LO(215) /* stbx */,
746 /* u b n x l */ HI(31) | LO(87) /* lbzx */,
748 /* u b w i s */ HI(39) /* stbu */,
749 /* u b w i l */ HI(35) /* lbzu */,
750 /* u b w x s */ HI(31) | LO(247) /* stbux */,
751 /* u b w x l */ HI(31) | LO(119) /* lbzux */,
755 /* u h n i s */ HI(44) /* sth */,
756 /* u h n i l */ HI(40) /* lhz */,
757 /* u h n x s */ HI(31) | LO(407) /* sthx */,
758 /* u h n x l */ HI(31) | LO(279) /* lhzx */,
760 /* u h w i s */ HI(45) /* sthu */,
761 /* u h w i l */ HI(41) /* lhzu */,
762 /* u h w x s */ HI(31) | LO(439) /* sthux */,
763 /* u h w x l */ HI(31) | LO(311) /* lhzux */,
767 /* u i n i s */ HI(36) /* stw */,
768 /* u i n i l */ HI(32) /* lwz */,
769 /* u i n x s */ HI(31) | LO(151) /* stwx */,
770 /* u i n x l */ HI(31) | LO(23) /* lwzx */,
772 /* u i w i s */ HI(37) /* stwu */,
773 /* u i w i l */ HI(33) /* lwzu */,
774 /* u i w x s */ HI(31) | LO(183) /* stwux */,
775 /* u i w x l */ HI(31) | LO(55) /* lwzux */,
781 /* s w n i s */ ARCH_32_64(HI(36) /* stw */, HI(62) | INT_ALIGNED | 0x0 /* std */),
782 /* s w n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x0 /* ld */),
783 /* s w n x s */ ARCH_32_64(HI(31) | LO(151) /* stwx */, HI(31) | LO(149) /* stdx */),
784 /* s w n x l */ ARCH_32_64(HI(31) | LO(23) /* lwzx */, HI(31) | LO(21) /* ldx */),
786 /* s w w i s */ ARCH_32_64(HI(37) /* stwu */, HI(62) | INT_ALIGNED | 0x1 /* stdu */),
787 /* s w w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | 0x1 /* ldu */),
788 /* s w w x s */ ARCH_32_64(HI(31) | LO(183) /* stwux */, HI(31) | LO(181) /* stdux */),
789 /* s w w x l */ ARCH_32_64(HI(31) | LO(55) /* lwzux */, HI(31) | LO(53) /* ldux */),
793 /* s b n i s */ HI(38) /* stb */,
794 /* s b n i l */ HI(34) /* lbz */ /* EXTS_REQ */,
795 /* s b n x s */ HI(31) | LO(215) /* stbx */,
796 /* s b n x l */ HI(31) | LO(87) /* lbzx */ /* EXTS_REQ */,
798 /* s b w i s */ HI(39) /* stbu */,
799 /* s b w i l */ HI(35) /* lbzu */ /* EXTS_REQ */,
800 /* s b w x s */ HI(31) | LO(247) /* stbux */,
801 /* s b w x l */ HI(31) | LO(119) /* lbzux */ /* EXTS_REQ */,
805 /* s h n i s */ HI(44) /* sth */,
806 /* s h n i l */ HI(42) /* lha */,
807 /* s h n x s */ HI(31) | LO(407) /* sthx */,
808 /* s h n x l */ HI(31) | LO(343) /* lhax */,
810 /* s h w i s */ HI(45) /* sthu */,
811 /* s h w i l */ HI(43) /* lhau */,
812 /* s h w x s */ HI(31) | LO(439) /* sthux */,
813 /* s h w x l */ HI(31) | LO(375) /* lhaux */,
817 /* s i n i s */ HI(36) /* stw */,
818 /* s i n i l */ ARCH_32_64(HI(32) /* lwz */, HI(58) | INT_ALIGNED | 0x2 /* lwa */),
819 /* s i n x s */ HI(31) | LO(151) /* stwx */,
820 /* s i n x l */ ARCH_32_64(HI(31) | LO(23) /* lwzx */, HI(31) | LO(341) /* lwax */),
822 /* s i w i s */ HI(37) /* stwu */,
823 /* s i w i l */ ARCH_32_64(HI(33) /* lwzu */, HI(58) | INT_ALIGNED | UPDATE_REQ | 0x2 /* lwa */),
824 /* s i w x s */ HI(31) | LO(183) /* stwux */,
825 /* s i w x l */ ARCH_32_64(HI(31) | LO(55) /* lwzux */, HI(31) | LO(373) /* lwaux */),
829 /* d n i s */ HI(54) /* stfd */,
830 /* d n i l */ HI(50) /* lfd */,
831 /* d n x s */ HI(31) | LO(727) /* stfdx */,
832 /* d n x l */ HI(31) | LO(599) /* lfdx */,
834 /* s n i s */ HI(52) /* stfs */,
835 /* s n i l */ HI(48) /* lfs */,
836 /* s n x s */ HI(31) | LO(663) /* stfsx */,
837 /* s n x l */ HI(31) | LO(535) /* lfsx */,
