History log of /PHP-8.3/ext/opcache/jit/zend_jit_arm64.dasc (Results 201 – 225 of 325)
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# 6a94b8b7 27-Apr-2021 Hao Sun

Support ZEND_JIT_ON_HOT_COUNTERS mode

This patch implements stub functions zend_jit_hybrid_hot_code_stub() and
zend_jit_hybrid_hot_counter_stub(), which is needed by HOT COUNTER mode,

Support ZEND_JIT_ON_HOT_COUNTERS mode

This patch implements stub functions zend_jit_hybrid_hot_code_stub() and
zend_jit_hybrid_hot_counter_stub(), which is needed by HOT COUNTER mode,
i.e. 'opcache.jit=123x'.

Test case "defined_001.phpt" can pass now since HOT COUNTER mode is
required by this case.

Change-Id: I66efb07c75fc64723dc76eff533d024c868f8022

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# ee921d29 27-Apr-2021 Hao Sun

Support ZEND_JIT_ON_PROF_REQUEST mode

This patch implements function zend_jit_hybrid_profile_jit_stub(), which
is needed by ZEND_JIT_ON_PROF_REQUEST mode, i.e. 'opcache.jit=122x'.

Support ZEND_JIT_ON_PROF_REQUEST mode

This patch implements function zend_jit_hybrid_profile_jit_stub(), which
is needed by ZEND_JIT_ON_PROF_REQUEST mode, i.e. 'opcache.jit=122x'.

Change-Id: Icb591c81675ffc077180229362882278ac8406c6

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# 999720bf 27-Apr-2021 Hao Sun

Remove the unnecessary 'bvs' check for IS_NOT_IDENTICAL case

This 'bvs' can be removed since the follow-up 'bne' also checks NaN.[1]

[1]
https://community.arm.com/developer/ip-p

Remove the unnecessary 'bvs' check for IS_NOT_IDENTICAL case

This 'bvs' can be removed since the follow-up 'bne' also checks NaN.[1]

[1]
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/condition-codes-4-floating-point-comparisons-using-vfp

Change-Id: Ie67db499c6be39ae4b339db533f51dacaeab4e4c

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# 2c90fe1d 27-Apr-2021 Dmitry Stogov

Fixed some compilation warnings


# c1198174 26-Apr-2021 Dmitry Stogov

Enable register allocator (it was disabled because ZREG_NUM wasn't
available for preprocessor) and fix few related problems.


# 735e4ccf 26-Apr-2021 Dmitry Stogov

Support for ZTS


# 997374f4 26-Apr-2021 Dmitry Stogov

Disable "red zone" usage (it leads to crashes).


# 57f2fe44 26-Apr-2021 Dmitry Stogov

Use "red zone" for HYBRID VM.
Support for CALL VM and VM without global register variables.


# add2544e 26-Apr-2021 Dmitry Stogov

Missed instruction


# 434eb1a3 26-Apr-2021 Dmitry Stogov

Duplicate return


# 91aaea36 26-Apr-2021 Dmitry Stogov

typo


# 018fca92 26-Apr-2021 Dmitry Stogov

Added missed UNDEF_OPLINE_RESULT


# 4039c586 26-Apr-2021 Hao Sun

Add the helper to check whether an immediate is valid for logical instructions

We implement a simplified version. Every value with one single bit can
be encoded for logical instructions

Add the helper to check whether an immediate is valid for logical instructions

We implement a simplified version. Every value with one single bit can
be encoded for logical instructions and we suppose this quick check can
cover a lot of common masks.

Besides, add macro TST_64_WITH_ONE since it's used often to test 64-bit
register with constant 1.

Change-Id: I850a6ac6acbe2d12f85180e407344580ee6fea61

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# 86326b5d 25-Apr-2021 Hao Sun

Fix the encoding of immediate for logical instructions

Previous implementation[1] of the immediate encoding for logical
instructions('and/orr/eor/tst') is incorrect. It's more complicate

Fix the encoding of immediate for logical instructions

Previous implementation[1] of the immediate encoding for logical
instructions('and/orr/eor/tst') is incorrect. It's more complicated than
that of 'add/sub/ldr/str/movz'.[2]

Ideally a helper is needed to "determine whether an immediate value can
be encoded as the immediate operand of a logical instruction for the
given register size"[3].

Macros "BW_OP_x_WITH_CONST" and "TST_x_WITH_CONST" are defined to wrap
the logical instrunctions with constants. Currently this helper is not
implemented yet.

All the uses of bitwise operations and 'tst' are revisited and updated.

Note that test case bug80745.phpt will pass with this patch.

[1] https://github.com/php/php-src/commit/47d8252
[2]
https://dinfuehr.github.io/blog/encoding-of-immediate-values-on-aarch64/
[3]
https://github.com/llvm-mirror/llvm/blob/5c95b810cb3a7dee6d49c030363e5bf0bb41427e/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h#L213

Change-Id: I0bfa088cafcffe30e0f18fa1f0638338ef00eb20

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# 06b9eb50 25-Apr-2021 Hao Sun

Support failed test case: switch_jumptable.phpt

Opcodes ZEND_SWITCH_LONG, ZEND_SWITCH_STRING and ZEND_MATCH are
supported in this patch.

Change-Id: I71ae3d40e65ec1b29d3d9115ac41

Support failed test case: switch_jumptable.phpt

Opcodes ZEND_SWITCH_LONG, ZEND_SWITCH_STRING and ZEND_MATCH are
supported in this patch.

Change-Id: I71ae3d40e65ec1b29d3d9115ac41caef17cf6ae5

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# ff72c157 25-Apr-2021 Hao Sun

Remove the TODO comments for DOUBLE CMP

As explained by Dmitry, 'ucomsd' in x86 sets 'p' flag, and it also
always sets 'z' and 'c' flags. [1]

Besides, remove one duplicate 'brea

Remove the TODO comments for DOUBLE CMP

As explained by Dmitry, 'ucomsd' in x86 sets 'p' flag, and it also
always sets 'z' and 'c' flags. [1]

Besides, remove one duplicate 'break'.

[1]. https://mudongliang.github.io/x86/html/file_module_x86_id_316.html

Change-Id: I767214c7ab8db31115801a3ae96b20320757899f

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# 42bec86a 22-Apr-2021 Hao Sun

Optimizing LONG MUL to SHIFT: refine the trigger condition and add overflow detection

LONG MUL can be optimzied into left shift if either operand is a power
of two. Conditions "IS_SIGNED

Optimizing LONG MUL to SHIFT: refine the trigger condition and add overflow detection

LONG MUL can be optimzied into left shift if either operand is a power
of two. Conditions "IS_SIGNED_32BIT()" and "is_power_of_two()" are used
to filter out invalid candidates. However, there exists one exception,
i.e. -2147483648(that is 0xffff,ffff,8000,0000). See the stand-alone
case[1].

Assume "a = 3; b = -2147483648;". The expected result of "a * b" is one
negative value. However, it would be optimized to "a << 31", which is
positive.

This trigger condition is refined.
1) For x86 implementation, another check for positive numbers is added.
Note that LONG type, i.e. zend_long, is defined as int32_t for x86 arch
and int64_t for x64 arch. This optimization only accepts values which
can be represented by int32_t type as default. See IS_SIGNED_32BIlT(),
2) For AArch64, we employ helper function zend_long_is_power_of_two()
since values of int64_t type are used.

Overflow detection for left shifting is added in this patch as well.

Note 1: bit helper functions are arch-independent and we move them into
zend_jit_internals.h.

Note 2: two test cases are added. Test case mul_003.phpt is used to
check the trigger condition and mul_004.phpt is designed to check
overflow detection.

Note 3: overflow detection for x86 is not implemented yet as I think
anotehr temporay register besides R0 is needed. Hence mul_004.phpt would
fail on x86 machine.
If we can use R1 as tmp_reg, the code can be updated as below.

```
| GET_ZVAL_LVAL result_reg, op1_addr
if (may_overflow) {
use_ovf_flag = 0;
/* Compare 'op' and '((op << n) >> n)' for overflow.
* Flag: jne -> overflow. je -> no overflow.
*/
tmp_reg = ZREG_R1
| mov Ra(tmp_reg), Ra(result_reg)
| shl Ra(tmp_reg), floor_log2(Z_LVAL_P(Z_ZV(op2_addr)))
| sar Ra(tmp_reg), floor_log2(Z_LVAL_P(Z_ZV(op2_addr)))
| cmp Ra(tmp_reg), Ra(result_reg)
}
| shl Ra(result_reg), floor_log2(Z_LVAL_P(Z_ZV(op2_addr)))
```

[1]. https://godbolt.org/z/1vKbfv8oG

Change-Id: Ie90e1d4e7c8b94a0c8f61386dfe650fa2c6879a1

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# c84cc926 23-Apr-2021 Dmitry Stogov

Fixed type checks and return value handling


# 35011519 23-Apr-2021 Dmitry Stogov

Create C call frames for helper functions that perform nested calls


# 1c6bea81 23-Apr-2021 Dmitry Stogov

Fixed incorrect efree()


# cf3c3131 23-Apr-2021 Dmitry Stogov

Disable unsuitable optimization


# a1bf150b 23-Apr-2021 Dmitry Stogov

Fixed condition and avoid usage of non-temporary registers


# b9281168 23-Apr-2021 Dmitry Stogov

Wrong register


# 8f98474b 23-Apr-2021 Dmitry Stogov

Fixed type check


# c1020c4e 23-Apr-2021 Dmitry Stogov

Support for interupts


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