Fixed zend_long_is_power_of_two/zend_long_floor_log2 mess

Fixed possible failure when repair after overflow detection

JIT/AArch64: disable register allocation for expected ++/-- overflow case.

This fixes ext/opcache/tests/jit/inc_021.phpt with tracing JIT.

Generate veneers to perform long jumps.

This makes symfony_demo app working with -d opcacge.jit=1205.
(21 MB of JIT-ed code).

Fixed ZTS build.

Use better code for trace exits. Don't store CPU registers that can't be used by deoptimizer.

Remove unused TMP4. Use intra-precedure call scratch registers for TMP2 and TMP3.

Reenable PROFITABILITY_CHECKS

Fixed incorrect range check (missed sign bit)

Fix commit 8143a49: macro ADD_SUB_64_WITH_CONST_32 should be used

"(struct.._offset+offsetof(zend_..struct, field))" might exceed the
range of ADD_SUB_IMM, leading to DynASM error DASM_S

Fix commit 8143a49: macro ADD_SUB_64_WITH_CONST_32 should be used

"(struct.._offset+offsetof(zend_..struct, field))" might exceed the
range of ADD_SUB_IMM, leading to DynASM error DASM_S_RANGE_I for
ZTS+CALL test variant.

Using macro ADD_SUB_64_WITH_CONST_32 would fix it.

Change-Id: I3233cefbcd1ddea16e7de6725c2dc5ff43373916

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Fixed incorrect stack size calculation (sizeof(zval) == 16)

Peephole Code Optimization:

ldr + sxtw -> ldrsw
lsl + add/sub/cmp -> add/sub/cmp (shifted register)
LOAD_64BIT_VAL + add -> ADD_SUB_64_WITH_CONST

Use better code for prologue and fix code generaion for "return -1".

Fix compilation warnings

Fixed JIT failure on Zend/tests/bug43175.phpt ZTS build, CALL VM.

Revert the macro uses for Z_TYPE_P(val) in commit 1fff62b

As suggested by Dmitry, macro CMP_32_WITH_CONST is not necessary because
Z_TYPE_P(val) is of uchar type and it can be encoded as

Revert the macro uses for Z_TYPE_P(val) in commit 1fff62b

As suggested by Dmitry, macro CMP_32_WITH_CONST is not necessary because
Z_TYPE_P(val) is of uchar type and it can be encoded as the imm field of
'cmp' instruction directly.

Change-Id: Icb8f9ee847b9a08cb1e9127e7faf6c89d1431922

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Fixed profile based JIT (opcache.jit=1225)

Fix commit 6e344ed: temporary register should be kept for GET_ZVAL_LVAL

Macro GET_ZVAL_LVAL is optimized in commit 6e3443d, using 'reg' as the
temporary register. However, the assertion

Fix commit 6e344ed: temporary register should be kept for GET_ZVAL_LVAL

Macro GET_ZVAL_LVAL is optimized in commit 6e3443d, using 'reg' as the
temporary register. However, the assertion would fail for "jit=1205".

This patch reverts this optimization for GET_ZVAL_LVAL.

Change-Id: Iecb134fa9438ef993e6393974caa5710657a462e

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Use fewer temporary registers if possible

For macro "SAFE_MEM_ACC_WITH_UOFFSET* ldr/ldrb", the target register can
be used as temporary register to load the offset if needed. Hence one

Use fewer temporary registers if possible

For macro "SAFE_MEM_ACC_WITH_UOFFSET* ldr/ldrb", the target register can
be used as temporary register to load the offset if needed. Hence one
temporary register is saved for macros LONG_CMP, GET_ZVAL_LVAL,
CMP_ZVAL_TYPE, IF_ZVAL_TYPE and IF_NOT_ZVAL_TYPE.

Change-Id: I43f35186cec9a4157bc73b1cae6643aa59140de2

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Improve macro LONG_ADD_SUB_WITH_IMM

Offset "Z_OFFSET(op1_addr)" might be loaded into temporary registers for
two times, i.e. by these two SAFE_MEM_ACC_WITH_UOFFSET respectively.

Improve macro LONG_ADD_SUB_WITH_IMM

Offset "Z_OFFSET(op1_addr)" might be loaded into temporary registers for
two times, i.e. by these two SAFE_MEM_ACC_WITH_UOFFSET respectively.

This patch removes this case.

Change-Id: Ib1fde9c9a39f6b5f1ca322dc27b0a9d9d51fbef0

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Remove the deprecated macros

Macros PUSH_BASE_ADDR, PUSH_ADDR_ZTS, GET_ZVAL_W2, SET_ZVAL_W2,
IS_32BIT, PUSH_ADDR and PUSH_ZVAL_ADDR are 32-bit platform dependent in
the x86 implement

Remove the deprecated macros

Macros PUSH_BASE_ADDR, PUSH_ADDR_ZTS, GET_ZVAL_W2, SET_ZVAL_W2,
IS_32BIT, PUSH_ADDR and PUSH_ZVAL_ADDR are 32-bit platform dependent in
the x86 implementation, hence they are derepcated in AArch64.

Macro ADDR_OP1 is only used by PASH_* macros, and it is deprecated in
AArch64.

Macros MEM_OP3_3 and AVX_OP are platform dependent and they are not used
in AArch64.

Macro LONG_OP_WITH_32BIT_CONST is replaced with LONG_ADD_SUB_WITH_IMM.

Macro DOUBLE_OP is not used because we use temporary FP register to load
the value from address firstly and then conduct FP math operations with
the help of DOUBLE_MATH_REG.

Macro LONG_MUL is deprecated. MUL between two LONG values is implemented
in a different way from ADD or SUB mainly because extra temporary
register is needed in order to detect integer overflow. See function
zend_jit_math_long_long().

Change-Id: I249f28820aaa86c7638ecf3eee08f8750a232397

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Use macros CMP_*_WITH_CONST if possible

Macros CMP_*_WITH_CONST were introduced in [1]. We revisit all the uses
of 'cmp' instructions with constants, and apply these macros if
possib

Use macros CMP_*_WITH_CONST if possible

Macros CMP_*_WITH_CONST were introduced in [1]. We revisit all the uses
of 'cmp' instructions with constants, and apply these macros if
possible.

[1] https://github.com/php/php-src/commit/66ba9af

Change-Id: Idd233cb9afba84dd106fcc5ee8bf5417d91989c7

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Use ADD_SUB_IMM for macros ADD_SUB_*_WITH_CONST*

Macros ADD_SUB_*_WITH_CONST* were introduced in [1], but it would be
more accurate to use ADD_SUB_IMM even though ADD_SUB_IMM == CMP_IMM.

Use ADD_SUB_IMM for macros ADD_SUB_*_WITH_CONST*

Macros ADD_SUB_*_WITH_CONST* were introduced in [1], but it would be
more accurate to use ADD_SUB_IMM even though ADD_SUB_IMM == CMP_IMM.

Regarding the definition of ADD_SUB_IMM, the comment is updated since it
is used to guard 'subs' and adds' instructions as well.

[1] https://github.com/php/php-src/commit/0609b97

Change-Id: I102ebbf626a438da061f6c01b01029807de1ff14

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Don't use TMP3 except ZTS

Currently temporary register TMP3 is used in particular for ZTS mode.
Hence it would be better not to use it in other sites except ZTS.

In this patch,

Don't use TMP3 except ZTS

Currently temporary register TMP3 is used in particular for ZTS mode.
Hence it would be better not to use it in other sites except ZTS.

In this patch, the value in TMP1, i.e. "REG1 + IP", might be clobbered
and should be calcauted again.

Change-Id: I17434d4f4b8d6f1e71f49eadb42e06db975d7bbe

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Use proper macro