JIT/AArch64: [macos] Remove Clang warning due to -Wincompatible-pointer-types (#7098)

The following warning message would be produced for macOS on Apple
silicon.

```
php-src

JIT/AArch64: [macos] Remove Clang warning due to -Wincompatible-pointer-types (#7098)

The following warning message would be produced for macOS on Apple
silicon.

```
php-src/ext/opcache/jit/zend_jit_arm64.dasc:15356:79: warning: incompatible pointer types passing 'ptrdiff_t *' (aka 'long *') to parameter of type 'int64_t *'
(aka 'long long *') [-Wincompatible-pointer-types]
const char *name = zend_jit_disasm_find_symbol((ptrdiff_t)cp + offset - 4, &offset);
^~~~~~~
ext/opcache/jit/zend_jit_disasm.c:210:58: note: passing argument to parameter 'offset' here
int64_t *offset) {

^
```

Flag -Wincompatible-pointer-types is enabled by default in Clang [1],
but not in GCC [2].

Adding explicit type conversion would remove this warning.

[1]
https://releases.llvm.org/10.0.0/tools/clang/docs/DiagnosticsReference.html#wincompatible-pointer-types
[2]
https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Warning-Options.html#Warning-Options

Change-Id: Ia0777a5731ba8f0764e232c0d47aeaab076d13f5

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JIT/AArch64: Improved code generation for SL/SR and register allocation (#7096)

- perform constant shift by single instruction
TODO: DynAsm: can't encode "lsl x0, x0, #var" !!!
- a

JIT/AArch64: Improved code generation for SL/SR and register allocation (#7096)

- perform constant shift by single instruction
TODO: DynAsm: can't encode "lsl x0, x0, #var" !!!
- avoid usage of REG1 for variable shift (it was x86 limitation)
- enable register reuse for SL/SR instructions
- remove special scratch register handling for SL/SR (it was x86
limitation)
- Remove need for extra scratch registers. AArch64 JIT backend
don't use extra register for constants. It uses reserved TMP
registers.

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"http://" -> "https://"

JIT Refactoring:

- Move duplicate system independent functions from zend_jit_x86.dasc and
zend_jit_arm64.dasc into zend_jit.c
* zend_jit_is_constant_cmp_long_long()
* zend_

JIT Refactoring:

- Move duplicate system independent functions from zend_jit_x86.dasc and
zend_jit_arm64.dasc into zend_jit.c
* zend_jit_is_constant_cmp_long_long()
* zend_jit_needs_call_chain()
* skip_valid_arguments()
* zend_ssa_cv_info()
* zend_jit_may_avoid_refcounting()
* zend_get_known_property_info()
* zend_may_be_dynamic_property()
- Move common definitions from zend_jit_x86.dasc and
zend_jit_arm64.dasc into zend_jit.c
* GCC_GLOBAL_REGS
* PROFITABILITY_CHECKS
* BP_JIT_IS
* sp_adj_kind
* sp_adj[]
- Remove unused DynAsm macros
* ADDR_CMP (arm64)
- Inline and remove DynAsm macros used once
* LOAD_BASE_ADDR (arm64 and x86)
* PUSH_BASE_ADDR (x86)
* MEM_OP3_3 (x86)
* SET_Z_PTR (x86)
- Rename DynAsm macros
* MEM_LOAD_OP_STORE -> MEM_UPDATE (arm64)
* MEM_LOAD_OP_STORE_ZTS - > MEM_UPDATE_ZTS (arm64)
* ADDR_OP1 -> PUSH_ADDR (x86)
* ADDR_OP2_2 -> ADDR_STORE and ADDR_CMP (x86)
* MEM_OP2_1_ZTS -> MEM_STORE_ZTS, MEM_CMP_ZTS, MEM_UPDATE_ZTRS (x86)
* MEM_OP2_2 -> MEM_LOAD and MEM_LOAD_OP (x86)
* MEM_OP2_2_ZTS -> MEM_LOAD_ZTS and MEM_LOAD_OP_ZTS (x86)
* SSE_AVX_OP -> DOUBLE_CMP (x86)
* SSE_GET_LONG -> DOUBLE_GET_LONG (x86)
* SSE_GET_ZVAL_LVAL -> DOUBLE_GET_ZVAL_LVAL (x86)
* SSE_GET_ZVAL_LVAL -> DOUBLE_GET_ZVAL_LVAL (x86)
* SSE_GET_ZVAL_DVAL -> DOUBLE_GET_ZVAL_DVAL (x86)
* SSE_SET_ZVAL_DVAL -> DOUBLE_SET_ZVAL_DVAL (x86)

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JIT/AArch64: Code refactoring for macros (#7082)

* JIT/AArch64: Code refactoring for macros

Update the comments and rename arguments for some macros.

The following macros a

JIT/AArch64: Code refactoring for macros (#7082)

* JIT/AArch64: Code refactoring for macros

Update the comments and rename arguments for some macros.

The following macros are renamed:
SAFE_MEM_ACC_WITH_UOFFSET -> MEM_ACC_64_WITH_UOFFSET
SAFE_MEM_ACC_WITH_UOFFSET_32 -> MEM_ACC_32_WITH_UOFFSET
SAFE_MEM_ACC_WITH_UOFFSET_BYTE -> MEM_ACC_8_WITH_UOFFSET
MEM_STORE_BYTE_ZTS -> MEM_STORE_8_ZTS
MEM_STORE_ZTS -> MEM_STORE_64_ZTS
MEM_LOAD_ZTS -> MEM_LOAD_64_ZTS
MEM_LOAD_BYTE_ZTS -> MEM_LOAD_8_ZTS
ADD_IP_FROM_CST -> ADD_IP_WITH_CONST

The following macros are deprecated and removed:
SET_Z_PTR, GET_Z_W2, SET_Z_W2

Change-Id: I767cf70f373e5f5a1090079e70f8e953a654da00

* Use MEM_ACCESS_*_WITH_UOFFSET

It's more accurate to use "MEM_ACCESS_*_WITH_UOFFSET" than
"MEM_ACC_*_WITH_UOFFSET".

Change-Id: I71479a809008848b61c4786016e6c10110e6aa8b

* Revert the updates for macros ADD_IP_WITH_CONST and LONG_ADD_SUB_WITH_IMM

As pointed by Dmitry, (int32_t) (1LL << 32) would make the assertion
"TRUE", which is not expected by us.

Change-Id: I767cf70f373e5f5a1090079e70f8e953a654da00

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JIT/AArch64: Use ZR directly to zero FP register (#7081)

Zero register, i.e. xzr, can be used directly to zero FP register.

TODO: FMOV from ZR may be slow on some cores and the pref

JIT/AArch64: Use ZR directly to zero FP register (#7081)

Zero register, i.e. xzr, can be used directly to zero FP register.

TODO: FMOV from ZR may be slow on some cores and the preferred
instructio is MOVI with immediate zero [1]. However, MOVI is not
recoginized by DynASM/arm64.

[1] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=523d72071960

Change-Id: I0eaee4445e05adb45c6bb80ddb62ea02cdc9f4db

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JIT/AArch64: Use D registers for floating-point operations (#7080)

In AArch64, 32 registers, i.e. v0~v31, can be used by the SIMD and
floating-point operations. [1][2]

In PHP th

JIT/AArch64: Use D registers for floating-point operations (#7080)

In AArch64, 32 registers, i.e. v0~v31, can be used by the SIMD and
floating-point operations. [1][2]

In PHP the floating-point operations use 64-bit DOUBLE type, and SIMD
operations are not supported currently. Hence we can use D registers
directly.

Note that "ZREG_V*" is kept to denote the register index.

[1]
https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/NEON-and-floating-point-registers/Scalar-register-sizes
[2]
https://github.com/ARM-software/abi-aa/blob/2bcab1e3b22d55170c563c3c7940134089176746/aapcs64/aapcs64.rst#612simd-and-floating-point-registers

Change-Id: I286ce07a49e837b560e3401c742ec91fc561546b

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JIT/AArch64: [macos][ZTS] Support fast path for tlv_get_addr (#7042)

* JIT/AArch64: [macos][ZTS] Support fast path for tlv_get_addr

Access to TLV(thread local variable) in macOS is

JIT/AArch64: [macos][ZTS] Support fast path for tlv_get_addr (#7042)

* JIT/AArch64: [macos][ZTS] Support fast path for tlv_get_addr

Access to TLV(thread local variable) in macOS is in "dynamic" form and
function tlv_get_addr() is invoked to resolve the address. See the
example in [1].

Note there is one struct TLVDescriptor [2] for each TLV. The first
member holds the address of function tlv_get_addr(), and the other two
members, "key" and "offset", would be used inside tlv_get_addr().

The disassembly code for function tlv_get_addr() is shown in [3]. With
the value from system register, i.e. tpidrro_el0, together with "key"
and "offset", the TLV address can be obtained.

Note that the value from tpidrro_el0 varies for different threads, and
unique address for TLV is resolved.

It's worth noting that slow path would be executed, i.e. function
tlv_allocate_and_initialize_for_key(), for the first time of TLV access.

In this patch:
1. "_tsrm_ls_cache" is guaranteed to be accessed before any VM/JIT code
during the request startup, e.g. in init_executor(), therefore, slow
path can be avoided.

2. As TLVDecriptor is immutable and zend_jit_setup() executes once, we
get this structure in tsrm_get_ls_cache_tcb_offset(). Note the 'ldr'
instruction would be patched to 'add' by the linker.

3. Only fast path for tlv_get_addr() is implemented in macro
LOAD_TSRM_CACHE.

With this patch, all ~4k test cases can pass for ZTS+CALL in macOS on
Apple silicon.

[1] https://gist.github.com/shqking/4aab67e0105f7c1f2c549d57d5799f94
[2]
https://opensource.apple.com/source/dyld/dyld-195.6/src/threadLocalVariables.c.auto.html
[3] https://gist.github.com/shqking/329d7712c26bad49786ab0a544a4af43

Change-Id: I613e9c37e3ff2ecc3fab0f53f1e48a0246e12ee3

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Fixed ARM64 JIT build

Fix edge cases in JIT for ASSIGN_DIM_OP.

Revert "Fix edge cases in JIT for ASSIGN_DIM_OP."

This reverts commit 4744dc8d2131393e3960e2b941ef5b5381242b61.

This seems to have broken some tests in sapi/fpm, and also causes

Revert "Fix edge cases in JIT for ASSIGN_DIM_OP."

This reverts commit 4744dc8d2131393e3960e2b941ef5b5381242b61.

This seems to have broken some tests in sapi/fpm, and also causes
the test runner to get killed.

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Fix edge cases in JIT for ASSIGN_DIM_OP.
(This fixes Zend/tests/bug79947.phpt and
Zend/tests/undef_index_to_exception.phpt without PROFITABILITY_CHECKS).

JIT/AArch64: [macos] Fix arguments to variadic function (#7023)

zend_throw_error() and zend_error() are variadic functions. In Linux,
arguments are passed in registers, whereas they must

JIT/AArch64: [macos] Fix arguments to variadic function (#7023)

zend_throw_error() and zend_error() are variadic functions. In Linux,
arguments are passed in registers, whereas they must be put on stack in
Macos [1][2].

In this patch:
1. preprocessor macro "__APPLE__" is used to distinguish the OS.
2. the third argument "CARG3" is the only variadic argument and put on
stack.
3. the invocation of zend_error() is converted back to regular call in
zend_jit_undefined_offset_stub() and zend_jit_undefined_index_stub().

With this patch, all ~4k test cases can pass for "nonZTS+CALL"
functional/tracing JIT with Macos Apple Silicion.

[1]
https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms#Overview
[2] https://github.com/below/HelloSilicon#listing-9-1

Change-Id: I49bc3233fc253ad3e77e8664464ff3e830dcd183

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Fix register save/restore around calls. (This fixes ext/opcache/tests/jit/fetch_dim_rw_001.phpt with -d opcache.jit=1202 without PROFITABILITY_CHECKS)

JIT/AArch64: Fix typo in commit dc0e259 (#7021)

PHP JIT/AArch64 building is broken. Instruction "beq" should be used.

Change-Id: I16c00f87bafb3a565141e1e02c9e15653f39a276

Merge branch 'PHP-8.0'

* PHP-8.0:
Fixed bug #80968 (JIT segfault with return from required file)

JIT/AArch64: Fixed incorrect MEM_LOAD usage

JIT/AArch64: Fixed DWARF frame description for helper stubs

JIT/AArch64: Link traces through exit tables.

1. Generate exit table at the end of each trace (list of unconditional branches for all side exit)
2. Jump to this table if conditional bran

JIT/AArch64: Link traces through exit tables.

1. Generate exit table at the end of each trace (list of unconditional branches for all side exit)
2. Jump to this table if conditional branch to side exit can't be performed because of limited jump distance (+/-1MB) (avoid extra veneers for side exits).
3. During trace linking, update targets of conditional branches to this exit table, if target trace can't be reachd because of limited jump distance (+/-1MB)

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JIT: Don't include zend_jit_trace_info.jmp_table_size into zend_jit_trace_info.code_size

JIT/AArch64: Combine ADRP+ADD+LDR into ADRP+LDR

before:
adrp x15, #0xffff8ae5a000
add x15, x15, #0xd90
ldr d16, [x15]
after:
adrp x15, #0x

JIT/AArch64: Combine ADRP+ADD+LDR into ADRP+LDR

before:
adrp x15, #0xffff8ae5a000
add x15, x15, #0xd90
ldr d16, [x15]
after:
adrp x15, #0xffff8ae5a000
ldr d16, [x15, #0xd90]

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JIT/AArch64: Use ADR/ADRP if it makes sense

JIT/AArch64: Rename B_IMM26 into B_IMM.

Introduce and use ZEND_JIT_TARGET_X86 and ZEND_JIT_TARGET_ARM64 macros.
Remove x86 specific code from ext/opcache/jit/zend_jit_arm64.dasc.
Fixed ARM64 build without libcapstone.

Correct DWARF frame description.

Now GDB correctly shows backtraces that involves JIT-ed code for
functional/tracing JIT, HYBRID/CALL VM, x86/AArch64 CPU.
(opcache.jit_debug=0x100 sh

Correct DWARF frame description.

Now GDB correctly shows backtraces that involves JIT-ed code for
functional/tracing JIT, HYBRID/CALL VM, x86/AArch64 CPU.
(opcache.jit_debug=0x100 should be set).

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